Jtekt Corporation

Yasuyuki Wakita

Yasuhide Takeda

Shigeki Nagase

Masaya Segawa

Motoo Nakai

Satoshi Tanno

A gate pad and a source pad are disposed on a semiconductor layer. The gate pad is disposed at the center portion of the semiconductor layer and has the shape of a circle centered on the center of the semiconductor layer as viewed in plan. The source pad is disposed so as to surround the gate pad, and has the shape of a circular ring centered on the center of the semiconductor layer as viewed in plan. A plurality of unit cells that compose a trench type MOSFET element are formed in the semiconductor layer.

Semiconductor device for reducing gate wiring length

A gate pad is disposed on a semiconductor layer composed of an ntype substrate, an ntype epitaxial layer, and a ptype body layer. The gate pad is disposed at the center portion of the semiconductor layer as viewed in plan. A plurality of unit cells that compose a trench type MOSFET element are provided in the semiconductor layer. The plurality of unit cells are arranged in the radial direction about the gate pad as viewed in plan. A gate electrode of a unit cell (center-side unit cell) that is proximate to the gate pad is electrically connected to the gate pad. Gate electrodes of unit cells that are adjacent to each other in the radial direction are connected to each other.

Semiconductor device for reducing propagation time of gate input signals

A control device of a motor unit has a gear housing having a supporting wall portion, a ceramic portion formed on the supporting wall portion, a circuit board body fixed to the ceramic portion, a power element located inside the circuit board body, and a load receiving member that is located around the power element inside the circuit board body and receives a load applied to the circuit board body.

Control device and motor unit including the control device

An insulated gate field effect transistor configured to reduce the occurrence of a short-circuit fault, and a method of manufacturing the insulated gate field effect transistor are provided. A FET includes a semiconductor substrate, a gate insulator, a gate electrode, and a conductive member. The semiconductor substrate has an insulation groove that splits a channel region into a first channel region on a drain region side and a second channel region on a source region side. The conductive member is supported by a drain-side end face and a source-side end face of the insulation groove. When the temperature of the conductive member is equal to or higher than a predetermined temperature, the conductive member is cut.

Insulated gate field effect transistor and method of manufacturing the same

A circuit board unit of an ECU has an upper surface on which semiconductor elements are installed, a lower surface that is on the opposite side of the circuit board unit from the upper surface, and a cutout portion that is formed below the upper surface. A power module includes a conductive protruding piece and an electrically insulating main portion that holds the protruding piece. The conductive protruding piece is inserted in the cutout portion to support the circuit board unit, and is electrically connected to the semiconductor elements.

Growing community of inventors

Kashihara, Japan

Yasuyuki Wakita