Matsushita Electric Industrial Co., Ltd.

Panasonic Corporation

Yasuyuki Tomida

Koji Kitamura

Kazunori Okajima

Hironobu Mori

Kunihiro Kaida

A data transfer request of a data pro cessing device with respect to a synchronous memory is divided by a burst transfer length unit request dividing section into a plurality of data transfer requests in which a data transfer amount is an amount of data to be burst-transferred at a time and the data to be burst-transferred at a time is within a single memory bank. An assembling section assembles the divided data transfer requests into a plurality of new data transfer requests obtained by combining the divided data transfer requests, one for each memory bank. A data processing device can efficiently access continuous data stored in a plurality of memory banks, and is useful as a memory access control circuit of controlling an access operation of a data processing device with respect to a synchronous memory.

Memory access control circuit

A remote control receiving circuit for receiving a remote control signal from a transmitter includes a header interrupt generation circuit that outputs a header interrupt signal when detecting the header of the signal, a data interrupt generation circuit that outputs a data interrupt signal when the header has been detected and the predetermined data receiving is completed, and a switch that selects the header interrupt signal or data interrupt signal in accordance with an instruction of the CPU. A CPU has one interrupt port for receiving the interrupt signal selected by the switch, and performs control in accordance with the received interrupt signal. Therefore, a remote control receiving system can reduce the codes, processing power, and resources of the CPU, which are used to implement the remote control signal receiving function, and reduce the cost of the entire system.

Growing community of inventors

Osaka, Japan

Yasuyuki Tomida