Rohm Co., Ltd.

Yasuyuki Ohnishi

Hiromi Uenoyama

Kazuo Sato

Kazunori Torii

Michio Nakagawa

Yo Sawamura

A semiconductor device is equipped with a step-up circuit having a series of multiple charge pump units. Each of the units has a well separation type MOS transistor. The separation well of the transistor is coupled to a high potential so as to form double reverse biases between the N-type well and a P-type substrate and between the N-type well and a P-type well. This permits the threshold Vth of the MOS transistor to be held at low level. The units are provided with a clock whose current supply capability is limited until a predetermined condition (that a predetermined period of time has elapsed after the onset of the step-up circuit by a startup signal or that the output voltage has reached a predetermined level). This limitation of the clock facilitates suppression of power consumption by the step-up circuit during a startup, thereby reducing changes in amplitude of a supply voltage.

Semiconductor device equipped with a voltage step-up circuit

In a motor control circuit for a VCR, a microcomputer calculates a center frequency to be targeted by a drum motor based on frequency pulses from the capstan motor, and generates a speed control signal for the drum motor based on a frequency deviation of the drum motor from the center frequency. Thus, in the motor control circuit, color misplacement occurring during a tape speed change is eliminated easily and surely.

Motor speed control circuit for a videocassette recorder

A motor control circuit generates a signal representing a rotation frequency of a motor. It produces a motor speed error signal based on the rotation frequency. The error signal is changed by a speed gain circuit and supplied to the motor driving circuit through a filter. The filter is for preventing an oscillation in a servo loop. When the motor speed is out of a predetermined range, a gain of the speed error signal is reduced and the filter is disabled.

Motor control circuit which reduces the speed control gain and disables

A motor controller of the present invention has a frequency generator which outputs, in accordance with a rotation of the motor, a predetermined number of rotational signals every time the motor makes one rotation. A period signal representative of the period of the rotational signals is calculated, and the period signal and a predetermined value are subtracted to obtain a speed error signal. The error signal is stored at a predetermined address of a memory. A filter which performs filtering by use of a plurality of error signals in the memory and a subtracter which subtracts the error signals and the contents of the memory are provided. A selecting circuit outputs the error signal when the error signal is outside a predetermined range and outputs an output of the filter when the error signal is within the predetermined range. Thereafter, the selecting circuit outputs an output signal of the subtracter. A control signal is produced from an output of the selecting circuit. The driving torque of the motor is varied in accordance with the control signal.

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Kyoto, Japan

Yasuyuki Ohnishi