Sony Corporation

Sony Group Corporation

Yasushi Tateshita

Takuji Matsumoto

Keiji Tatani

Shinya Yamakawa

Kazuichiro Itonaga

Takahiro Toyoshima

Tetsuji Yamaguchi

Fumihiko Koga

Masahiro Tada

Takeshi Yanagita

Yorito Sakano

Hideo Kido

Kazunobu Ota

Takashi Nagano

Masaaki Takizawa

Keiichi Nakazawa

Naoyuki Miyashita

Motonobu Torii

Yoshihiko Nagahama

Hikaru Iwata

Takuya Toyofuku

Atsuhiko Yamamoto

Yoshiki Ebiko

Harumi Ikeda

Hiromi Okazaki

A semiconductor device including, in cross section, a semiconductor substrate; a gate insulating film on the semiconductor substrate; a gate electrode on the gate insulating film, the gate electrode including a metal, a side wall insulating film at opposite sides of the gate electrode, the side wall insulating film contacting the substrate; a stress applying film at the opposite sides of the gate electrode and over at least a portion of the semiconductor substrate, at least portion of the side wall insulating film being between the gate insulating film and the stress applying film and in contact with both of them; source/drain regions in the semiconductor substrate at the opposite sides of the gate electrode, and silicide regions at surfaces of the source/drain regions at the opposite sides of the gate electrode, the silicide regions being between the source/drain regions and the stress applying layer and in contact with the stress applying layer.

Semiconductor device and method of manufacturing the same

In the present invention, there is provided a semiconductor device including: element isolation regions formed in a state of being buried in a semiconductor substrate such that an element formation region of the semiconductor substrate is interposed between the element isolation regions; a gate electrode formed on the element formation region with an gate insulating film interposed between the gate electrode and the element formation region, the gate electrode being formed so as to cross the element formation region; and source-drain regions formed in the element formation region on both sides of the gate electrode, wherein a channel region made of the element formation region under the gate electrode is formed so as to project from the element isolation regions, and the source-drain regions are formed to a position deeper than surfaces of the element isolation regions.

Semiconductor device and semiconductor device manufacturing method

A semiconductor device in which sufficient stress can be applied to a channel region due to lattice constant differences.

Metal oxide semiconductor having epitaxial source drain regions and a method of manufacturing same using dummy gate process

The present technology relates to a solid-state imaging device and an electronic device that can expand a dynamic range in a pixel having a high-sensitivity pixel and a low-sensitivity pixel. The solid-state imaging device includes a pixel array unit in which a plurality of pixels is arranged in a two-dimensional manner, in which the pixel includes a first photoelectric conversion unit and a second photoelectric conversion unit having lower sensitivity than the first photoelectric conversion unit, and a size of the second photoelectric conversion unit in an optical axis direction in which light enters is smaller than a size of the first photoelectric conversion unit in the optical axis direction. The present technology can be applied to a backside-illumination CMOS image sensor, for example.

Solid-state imaging device with a pixel having a partially shielded photoelectric conversion unit region for holding charge

Image quality is improved. In an image pickup element, an interval between adjacent light receiving elements on a light receiving surface is changed depending on a position on the light receiving surface. Further, the image pickup element is manufactured by a method of manufacturing the image pickup element including layering photodiodes by repeatedly performing a silicon epitaxial process and an ion injection process. Further, the image pickup element is manufactured by the method of manufacturing the image pickup element including changing an interval between the photodiodes adjacent on the light receiving surface of the image pickup element in each layer depending on a position on the light receiving surface in addition to the layering thereof.

Image pickup element, image pickup apparatus, and method of manufacturing image pickup element

The present disclosure relates to a solid-state imaging device and an electronic apparatus which allow reduction of optical crosstalk. In an example of FIG.B, a charge storage unit is formed by a method in which a hole is bored in a substrate, a diffusion layer is formed in a surface of the hole, and an insulating film and an upper electrode are formed so as to fill the hole. In an example of FIG.C, a charge storage unit is formed by a method in which a hole is bored in a substrate, a diffusion layer is formed in a half (one side) of a surface of the hole, and an insulating film and an upper electrode are formed so as to fill the hole. The present disclosure can be applied to a CMOS solid-state imaging device used for an imaging apparatus such as a camera, for example.

Solid-state imaging device and electronic apparatus

Provided is a solid-state imaging device and an electronic device that can expand a dynamic range in a pixel having a high-sensitivity pixel and a low-sensitivity pixel. The solid-state imaging device includes a pixel array unit in which a plurality of pixels is arranged in a two-dimensional manner, in which the pixel includes a first photoelectric conversion unit and a second photoelectric conversion unit having lower sensitivity than the first photoelectric conversion unit, and a size of the second photoelectric conversion unit in an optical axis direction in which light enters is smaller than a size of the first photoelectric conversion unit in the optical axis direction.

Solid-state imaging device having pixels with high and low sensitivity photoelectric conversion units, and electronic device including the same

Provided are a solid-state imaging device and an electronic apparatus that include a charge storage unit. The charge storage unit is formed by a method in which a hole is bored in a substrate, a diffusion layer is formed in a surface of the hole, and an insulating film and an upper electrode are formed so as to fill the hole. The charge storage unit is formed by a method in which a hole is bored in a substrate, a diffusion layer is formed in a half (one side) of a surface of the hole, and an insulating film and an upper electrode are formed so as to the hole.

In an image pickup element, an interval between adjacent light receiving elements on a light receiving surface is changed depending on a position on the light receiving surface. Further, the image pickup element is manufactured by a method of manufacturing the image pickup element including layering photodiodes by repeatedly performing a silicon epitaxial process and an ion injection process. Further, the image pickup element is manufactured by the method of manufacturing the image pickup element including changing an interval between the photodiodes adjacent on the light receiving surface of the image pickup element in each layer depending on a position on the light receiving surface in addition to the layering thereof.

Disclosed is a solid-state imaging device which includes a pixel section, a peripheral circuit section, a first isolation region formed with a STI structure on a semiconductor substrate in the peripheral circuit section, and a second isolation region formed with the STI structure on the semiconductor substrate in the pixel section. The portion of the second isolation region buried into the semiconductor substrate is shallower than the portion buried into the semiconductor substrate of the first isolation region, and the height of the upper face of the second isolation region is equal to that of the first isolation region. A method of producing the solid-state imaging device and an electronic device provided with the solid-state imaging devices are also disclosed.

Growing community of inventors

Kanagawa, Japan

Yasushi Tateshita