Kabushiki Kaisha Toshiba

Yasushi Sasaki

Tetsuo Morita

Hajime Sato

Takanori Tsunashima

Yasuyuki Hanazawa

Masaki Miyatake

Hoko Hirai

Katsuhiko Inada

Koichi Shiba

When a voltage level of a pulse-cut first clock signal inputted to a first clock terminal is reversed in the state where a first transistor is turned on and a second transistor is turned off, an anti-reversal circuit including a seventh transistor and an eighth transistor supplies a high voltage VDD to a node n. In this way, a floating state of the node nis avoided, and the voltage level of the node nis prevented from being reversed. Accordingly, the second transistor will not be turned on in the interval, whereby electric potential of an output signal is stably maintained.

Shift register for pulse-cut clock signal

In a flat panel display device in which driving circuits and the like are arranged on an array substrate, a technology to realize a compact size and a low cost of an external control circuit is disclosed. At least one pumping circuit included in the external control circuit is arranged on the array substrate, and an output side capacitor connected between an output portion of the pumping circuit and the ground GND and an input side capacitor of a clock input portion are arranged outside the array substrate.

Pumping circuit and flat panel display device

A display device includes a substrate (), pixel electrodes (PIX) formed on the substrate (), scanning lines (G) to transmit scanning signals, signal lines (S) divided into four groups (LL, LR, RL and RR) to transmit data signals, signal line driving circuits () to drive the groups (LL, LR, RL and RR) of the signal lines (S), respectively, analog switch control signal lines (and) connected between the signal line driving circuits () and the groups (LL, LR, RL and RR) of the signal lines (S), and transistors (ASW) connected between the analog switch control signal lines (and) and the groups (LL, LR, RL and RR) of the signal lines (S) to provide the data signals to the pixel electrodes (PIX) in response to the scanning signals. An electrical path length between the signal line driving circuits () and a point (A) of the analog switch control signal lines (and) provided at a boundary region between the groups (LL and LR), for example, of the signal lines (S) is configured to be substantially the same as the one between the signal line driving circuits () and a point (B) of the analog switch control signal lines (and) provided at a boundary region between the groups (LL and LR) of the signal lines (S).

Display device

Growing community of inventors

Saitama-ken, Japan

Yasushi Sasaki