Rohm Co., Ltd.

Yasushi Hamazawa

Bungo Tanaka

Hajime Okuda

Daisuke Ichikawa

Nobuyuki Otsubo

A semiconductor device includes a semiconductor substrate of a first conductivity type, a first semiconductor layer of the first conductivity type formed on the semiconductor substrate and having a first conductivity type impurity concentration higher than that of the semiconductor substrate, a second semiconductor layer of a second conductivity type formed above the first semiconductor layer, a first device region formed in the second semiconductor layer and configured to operate based on a first reference voltage, a second device region formed in the second semiconductor layer and configured to operate based on a second reference voltage, the second device region being spaced apart from the first device region, and a region isolation structure interposed between the first and second device regions and formed in a region extending from a front surface of the second semiconductor layer to the first semiconductor layer so as to electrically isolate the first and second device regions from each other.

Semiconductor device

A semiconductor device includes a semiconductor layer of a first conductivity type, a second semiconductor layer of a second conductivity type embedded in the semiconductor layer, a first trench and a second trench formed in the semiconductor layer such that the first trench and the second trench penetrate the second semiconductor layer, a first insulating film formed on at least a side surface of the first trench, a second insulating film formed on at least a side surface of the second trench, a first sinker layer of the second conductivity type formed in a first portion of the semiconductor layer, a second sinker layer of the second conductivity type formed in the first portion of the semiconductor layer, a diode impurity region of the first conductivity type which is formed on the first surface of the semiconductor layer and forms a Zener diode by pn junction between the first sinker layer and the diode impurity region, a first wiring electrically connected to the diode impurity region, and a second wiring electrically connected to the second sinker layer.

Semiconductor device and method for manufacturing semiconductor device

An electronic component includes a first insulating layer, a high-voltage electrode formed on the first insulating layer, a low-voltage electrode formed on the first insulating layer so as to be spaced from the high-voltage electrode, and an uneven structure formed in a region between the high-voltage electrode and the low-voltage electrode along a surface of the first insulating layer.

Electronic component

A semiconductor device of the present invention includes a semiconductor layer, a source region and a drain region formed in a surface of the semiconductor layer, both having a first conductivity type, a plurality of gate trenches each formed so as to extend across the source region and the drain region, in a plan view observed in a direction of a normal to the surface of the semiconductor layer, a channel region of a first conductivity type made of the semiconductor layer sandwiched by the gate trenches adjacent to each other, having a channel length along a direction extending from the drain region to the source region, and a gate electrode buried in the gate trench via a gate insulating film, and the channel region has a thickness in the plan view not more than two times a width of a depletion layer to be generated due to a built-in potential between the channel region and the gate electrode.

Semiconductor device including a channel region and method for manufacturing the semiconductor device

A semiconductor device of the present invention includes a semiconductor layer in which a gate trench is formed, a gate insulating film formed along an inner surface of the gate trench, a gate electrode that is buried in the gate trench through the gate insulating film and that has a lower electrode and an upper electrode that are separated upwardly and downwardly from each other with an intermediate insulating film between the lower electrode and the upper electrode, and a gate contact that is formed in the gate trench so as to pass through the upper electrode and through the intermediate insulating film and so as to reach the lower electrode and that electrically connects the lower electrode and the upper electrode together.

Semiconductor device having trench gate structure and method for manufacturing the semiconductor device

A double diffusion MOSFET is disclosed which comprises: a drain regionof an N-type semiconductor layer formed on a semiconductor substrate; a body regionof a P-type semiconductor region formed in the drain region; an N-type source regionformed in the body region; and a gate electrodeformed on a surface of the body region, wherein the drain regioncontains N+ type drain contact regionsand P+ type regionssuch that those are put at an equal potential.

Double diffusion MOSFET with N+ and P+ type regions at an equal potential

On the surface of an n-type semiconductor layer as a drain region (,), a plurality of body regions (,) formed by p-type diffusion regions are formed regularly. And within each of the body regions (,), an n-type source region (,) is formed with a certain interval from the periphery, and a gate electrode (,) is provided through a gate oxide film (,) on the surface of a channel region (,) between the source region (,) and the drain region (,), and a drain electrode (,) is formed through a contact region (,) on the drain region (drain cell) (,) surrounded by the plurality of body regions (,). And the body region (,) is formed as an octagon on the plane, and the drain cell (,) is formed as a quadrilateral on the plane. As a result, a semiconductor device is obtained which has a lateral DMOS with an increased gate width per unit area that can increase the withstand voltage.

Growing community of inventors

Kyoto, Japan

Yasushi Hamazawa