Matsushita Electric Industrial Co., Ltd.

Panasonic Corporation

Panasonic Intellectual Property Management Co., Ltd.

Nippon Hoso' Kyokai

Matsushita Communication Ind. Co., Ltd.

Yasushi Fukushima

Katsuyuki Fukui

Ryoji Asada

Tadayuki Inoue

Tadami Mine

Toshiyuki Yasui

Tadahiro Yoshida

Masayuki Sugawara

Tomoyuki Tsurube

Shoji Nishikawa

Kazumasa Motoda

Yuji Kiniwa

Takamasa Yokoyama

Kohji Mitani

Yoshihiro Fujita

Hiroyuki Ono

Tetsurou Hanaoka

Hideo Cho

In an imaging apparatus, unevenness in brightness in screen due to flash is eliminated and video with secured continuity as a moving image can be obtained. In the imaging apparatus (), signals of fields affected by flash among video signals acquired by imaging are treated with adding or adding and averaging to equalize effects of flash which appear unevenly on a screen.

Imaging apparatus which corrects effects of flash

An image capturing unit outputs both a valid video signal (a primary video signal) and an unnecessary video signal (a secondary video signal) as an output signal; a flash detection unit detects white band interference caused by an external flash; and a flash correction unit delays the valid video signal using a first delay unit and delays the unnecessary video signal using a second delay unit. When white band interference has occurred, the outputs of the respective delay units are added together by an adding unit, generating a corrected signal. An output selection unit selects and outputs the signal from the first delay unit in normal times, and when interference caused by an external flash has occurred, selects and outputs the corrected signal.

Imaging apparatus, external flash correction method, recording medium, and integrated circuit

When capturing images of a subject with an imaging device that uses a CMOS image sensor, a white band-shaped artifact appears in the imaging signal due to the influence of a rolling shutter operation performed when an external flash has been emitted. Manipulating or removing images in which such an artifact appears requires specifying the frames in which the artifact appears. A line averaging unit () calculates the average luminance level of each line in the imaging signal, the average luminance levels are temporarily stored by a storage unit (), and thereafter a frame difference calculation unit () calculates the difference between the line average luminance levels and the line average luminance levels of the next frame. These frame difference values are compared with a reference value, and it is determined that the influence of an external flash is present if a portion of interest with high values is continuous for one frame period.

Imaging device, external flash detection method, program, and integrated circuit

An imaging apparatus includes an imaging unit having a discrete pixel structure that outputs directly signals of respective M sample points corresponding to M pixels per single frame for normal imaging and imaging at a first frame rate. The imaging unit adds signals of respective N pixels out of M pixels per single frame and outputs signals of M/N sample points (M and N are integers equal to or greater than 2) at each frame for high-speed imaging and imaging at a second frame rate greater than the first frame rate. An operation unit outputs directly output signals from the imaging unit for normal imaging and performs interpolation operations on the output signals from the imaging unit for interpolating signals of the (N&#x2212;1) sample points between respective sample points to output interpolated signals of the M sample points for high-speed imaging.

Imaging apparatus adapted to perform normal imaging and high-speed imaging

A stable charge coupled device (CCD) imaging apparatus operable in multiple frame rates for displaying a signal having a low frame rate in a viewfinder (VF), and also a recorder built-in type imaging apparatus using the CCD imaging apparatus are presented. The imaging apparatus includes a drive pulse switching circuit for multiplying a CCD drive pulse other than a CCD read pulse by (n/2) (where n is an arbitrary integer) when the multi-frame rate is low, a frame memory for storing an output signal of the CCD of one frame right after pulse output. The signal is read at every (n/2) frames. The frame memory repeats to read out the stored signal in one frame (n/2) times. The imaging apparatus further includes a camera signal processing circuit for performing a camera process to an output signal of the frame memory, and a recorder unit for recording an output signal of the camera signal processing circuit at the frame rate of the set mode. As a result, even at a low frame rate, the apparatus displays a signal in the VF. And with a properly-selected value of n, the apparatus conducts a signal having various frame rate between a camera and the recorder at a common frame rate.

CCD imaging apparatus applicable to a multi-frame rate image system

Signal levels of input three, R, G, and B, color video signals are examined by a level examining circuit. After a knee-compression is performed to the video signals, a selector selects the maximum knee-compressed color signal and the minimum knee-compressed color signal. A compression coefficient calculator calculates a compression coefficient of each color signal before and after the knee-compression. A medium color signal calculator determines a medium color signal. Another selector turns the compressed video signals back to three, R, B, and G, color signal outputs and releases them. Because the difference between any two of the R, G, and B color signals is equally compressed before and after the high-brightness compression, any change in a hue can successfully be avoided.

Apparatus and method for high-brightness compression

Error picture image data correction apparatus and method of the same

An error correction apparatus corrects erroneous data and reduces deformation of a displayed picture when inputted data are high frequency data around the erroneous data. R, G and B channel signals of data are inputted via input nodes 1a, 1b and 1c. A controller generates signals ch1 and ch2 which specify the erroneous data channel and a channel for data correction according to a control signal C from an error detection circuit. A correction data circuit generates correction data. For example, if G(i) is assumed to be erroneous data, the correction data circuit generates correction data as G'(i)=R(i)+G(i+1)-R(i-1) based on the previous data G(i-1) provided by a delay circuit and the data of the other errorless channel. The erroneous data G(i) is replaced with the correction data G'(i) and a set of corrected data R(i), G'(i) and B(i) is outputted as output data.

Error correction apparatus and solid state image capturing apparatus

A video camera having a plurality of solid-state image sensors in an imaging part uses two kinds of vertical drive signals different in the number of vertical transfer operations, to produce a time lag equal to one horizontal period between the output signals of the solid-state image sensors without changing the optical positional relation between the solid-state image sensors, thereby delaying the red and blue signals with respect to the green signal by one horizontal period based on the application of the two kinds of vertical drive signals.

Video camera having image sensors driven by different vertical drive

Growing community of inventors

Osaka, Japan

Yasushi Fukushima