Japan Aerospace Exploration Agency

Yasushi Deguchi

Satoshi Kuboyama

Sumio Matsuda

A dual structure is introduced to the transistor in a flip-flop or a data input step controlled by a clock of a semiconductor logic circuit. The dual structure is formed by connecting a transistor with a MOS transistor having a channel of the same conductivity type in series with respect to the line of a source or drain and connecting their gates to each other, or by connecting an inverter with p-MOS transistors, one for VDD side and one for VSS side of the output step. The dual structure prevents single event phenomenon in a semiconductor logic circuit, such as inverter, SRAM and data latch circuit.

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Tsukuba, Japan

Yasushi Deguchi