Agency of Industrial Science and Technology

Kogyo Gijutsuin

Yasuo Tarui

Yutaka Hayashi

Yoshio Komiya

Tsunenori Sakamoto

Toshihiro Sekigawa

Kiyoko Nagai

Eiichi Suzuki

Disclosed is a solar battery comprising a multi-layered 'p-n' junction structure, which has a plurality of inwardly converging recesses to partially expose the inner 'p-n' junctions to the sun light.

Solar battery

In an element of an integrated circuit including a transistor and a 'majority carrier diode' at least one terminal of which is connected to the base or collector of said transistor, the 'majority carrier diode' is laid out in a transistor portion of the integrated circuit to be surrounded by a part of base region extended to the surface of the semiconductor body, so that the paths for the load current of the transistor and the diode current are separated from each other, whereby a high speed operation at a heavy load current is made possible and/or so that reliability of said majority carrier diode is increased.

High speed element of an integrated circuit with a majority carrier

Disclosed is an optoelectronic semiconductor comprising a semiconductor substrate, a first insulating film covering the major surface of the semiconductor substrate and a second insulating film having electronic charge-storing means and lying on the first insulating film. When an optically guided wave is propagated to the first or second insulating film in the direction parallel to the major surface of the semiconductor substrate, an interaction is caused between the electronic charges stored in the charge-storing means and the optically guided wave, thereby allowing the optically guided wave to be modulated and the electronic charges to be released.

Optoelectronic semiconductor device

Disclosed herein is an improved field-effect transistor, having its effective base width determined by the impurity diffusion length or by a difference between impurity diffusion lengths for providing a reduced parasitic capacitance between gate and drain, and/or between gate or drain and other electrode. Disclosed also is a construction for effectively leading out an electrode from the base region and or source region, and methods adapted to manufacture the above-mentioned field-effect transistor.

Field-effect transistor

A semiconductor non-volatile optical memory device is constructed by providing light-permeable charge retention means in an insulating layer on a first semiconductor surface into which photo-generated carriers in the surface of the first semiconductor region are injected over the semiconductor-insulator potential barrier by applying reverse bias between the first semiconductor region and a second region forming a rectifying junction with the first semiconductor region. Also disclosed in a non-volatile memory integrated circuit employing one or more of said devices together with light source in the same package. The non-volatile memory integrated circuit operates under low bias voltage and is compatible with a high speed integrated logic circuits.

Semi-conductor non-volatile optical memory device

A high frequency insulated gate field effect transistor comprises a semiconductor body of one type of conductivity, a base region of the same type of conductivity as the semiconductor body but with a higher impurity concentration than the body, and drain and source regions of the opposite type of conductivity. A portion of the base region is disposed between the drain region and the source region and the impurity concentration of the base region is reduced from the source region toward the drain region and is less at its junction with the drain region than that of the drain region. Such transistor can be incorporated in an integrated circuit as an amplifier transistor with a depletion type transistor as a load transistor. A common region serves both as a drain region of the amplifier transistor and a source region of the load transistor. A process of making the transistor and the integrated circuit comprises masking a semiconductor body, forming windows in the mask and successively diffusing through the same window both a first impurity to form the base region and a second impurity to form the source region.

Growing community of inventors

Kurume, Japan

Yasuo Tarui