Sumco Corporation

Sumitomo Mitsubishi Silicon Corporation

Koike Sanso Kogyo Co., Ltd.

Sumitomo Metal Industries, Inc.

Enidine Co., Ltd.

Yasuo Koike

Toshiaki Ono

Shigeru Umeno

Shinsuke Sadamitsu

Masataka Horai

Tomokazu Katano

Eiichi Asayama

Kouji Sueoka

Tokuji Tanaka

Takashi Nakayama

Masataka Hourai

Hiroaki Taguchi

Naoki Ikeda

Tadami Tanaka

Hideshi Nishikawa

Masaharu Ninomiya

Ryuji Ohno

Shin Uchino

Masanori Akatsuka

Wataru Itou

Hisashi Katahama

Takeshi Kii

Tooru Nagashima

Kikuo Nakamura

Takehiko Karukome

Kumeo Iida

Fukuyoshi Kurosawa

An epitaxial silicon wafer includes a silicon wafer consisting of a COP region in which a nitrogen concentration is 1&#xd7;10&#x2212;1&#xd7;10atoms/cm, and an epitaxial silicon film formed on the silicon wafer. When heat treatment for evaluation is applied, a density of BMD formed inside the silicon wafer is 1&#xd7;10&#x2212;3&#xd7;10atoms/cmover the entire radial direction of the silicon wafer. An average density of the BMD formed in an outer peripheral region of the silicon wafer which is a 1-10 mm range separated inward from an outermost periphery thereof is lower than the average density of the BMD formed in a center region. A variation in the BMD density in the outer peripheral region is 3 or less, and a residual oxygen concentration in the outer peripheral region is 8&#xd7;10atoms/cmor more.

Epitaxial silicon wafer

A method for manufacturing an epitaxial wafer includes: a step of pulling a single crystal from a boron-doped silicon melt in a chamber based on a Czochralski process; and a step of forming an epitaxial layer on a surface of a silicon wafer sliced from the single crystal. The single crystal is allowed to grow while passed through a temperature region of 800 to 600&#xb0; C. in the chamber in 250 to 180 minutes during the pulling step. The grown single crystal has an oxygen concentration of 10&#xd7;10to 12&#xd7;10atoms/cmand a resistivity of 0.03 to 0.01 &#x3a9;cm. The silicon wafer is subjected to pre-annealing prior to the step of forming the epitaxial layer on the surface of the silicon wafer, for 10 minutes to 4 hours at a predetermined temperature within a temperature region of 650 to 900&#xb0; C. in an inert gas atmosphere. The method is to fabricate an epitaxial wafer that has a diameter of 300 mm or more, and that attains a high IG effect, and involves few epitaxial defects.

Method for manufacturing epitaxial wafer

A method of evaluating a silicon wafer includes obtaining first surface distribution information indicating an surface distribution of photoluminescence intensity on a surface of a silicon wafer; after obtaining the first surface distribution information, subjecting the silicon wafer to a thermal oxidation treatment, and then obtaining second surface distribution information indicating an surface distribution of photoluminescence intensity on the surface of the silicon wafer; obtaining difference information for the first surface distribution information and third surface distribution information, with the third surface distribution information having been obtained by correcting the second surface distribution information with a correction coefficient of less than 1; and based on the difference information obtained, evaluating an evaluation item selected from the group consisting of absence or presence of oxygen precipitates and surface distribution of oxygen precipitates in the silicon wafer being evaluated.

Method of evaluating silicon wafer and method of manufacturing silicon wafer

It is possible to provide a silicon wafer that as well as being free of COPs and dislocation clusters, has defects (grown-in defects including silicon oxides), which are not overt in an as-grown state, such as OSF nuclei and oxygen precipitate nuclei existing in the PV region, to be vanished or reduced, by adopting a method for producing a silicon wafer, the method comprising the steps of: growing a single crystal silicon ingot by the Czochralski method; cutting a silicon wafer out of the ingot; subjecting the wafer to an RTP at 1,250&#xb0; C. or more for 10 seconds or more in an oxidizing atmosphere; and removing a grown-in defect region including silicon oxides in the vicinity of wafer surface layer after the RTP.

Silicon wafer and method for producing the same

The present invention can provide a silicon semiconductor substrate used for and epitaxial wafer, in which uniform and high-level gettering ability is obtained irrespective of slicing positions from a silicon single crystal while generation of epitaxial defects can be suppressed, by doping carbon or carbon along with nitrogen during a pulling process of a CZ method or by performing appropriate heat treatment prior to the epitaxial process. Therefore, a crystal production yield can remarkably be improved because a permissible upper limit (concentration margin) of an oxygen concentration which is restricted by formation of a ring-shaped OSF region can be higher and also an excellent gettering ability is exhibited, while allowing an epitaxial wafer to be produced wherein epitaxial defects attributable to substrate crystal defects are not formed.

Silicon semiconductor substrate and production method thereof

A silicon wafer and a method for manufacturing the same are provided, wherein the silicon wafer has no crystal defects in the vicinity of the surface and provides excellent gettering efficiency in the process of manufacturing devices without IG treatment. The oxygen concentration and the carbon concentration are controlled respectively within a range of 11&#xd7;10-17&#xd7;10atoms/cm(OLD ASTM) and within a range of 1&#xd7;10-15&#xd7;10atoms/cm(NEW ASTM). A denuded zone having no crystal defects due to the existence of oxygen is formed on the surface and in the vicinity thereof, and oxygen precipitates are formed at a density of 1&#xd7;10-5&#xd7;10counts/cm, when a heat treatment is carried out at a temperature of 500-1000&#xb0; C. for 1 to 24 hours. In the method for manufacturing the silicon wafer, moreover, the silicon wafer having the oxygen and carbon concentrations as controlled above is heat-treated at a temperature of 1100&#xb0; C.-1380&#xb0; C. for 1 to 10 hours. The control of the oxygen and carbon concentrations in the growth of a single crystal with CZ method allows a desired density of oxygen precipitates to be attained in the process of manufacturing devices and thereby sufficient gettering efficiency to be obtained.

Silicon wafer and method for manufacturing the same

Silicon semiconductor substrate

A silicon wafer and a method for manufacturing the same are provided, wherein the silicon wafer has no crystal defects in the vicinity of the surface and provides excellent gettering efficiency in the process of manufacturing devices without IG treatment. The oxygen concentration and the carbon concentration are controlled respectively within a range of 11&#xd7;10&#x2013;17&#xd7;10atoms/cm(OLD ASTM) and within a range of 1&#xd7;10&#x2013;15&#xd7;10atoms/cm(NEW ASTM). A denuded zone having no crystal defects due to the existence of oxygen is formed on the surface and in the vicinity thereof, and oxygen precipitates are formed at a density of 1&#xd7;10&#x2013;5&#xd7;10counts/cm, when a heat treatment is carried out at a temperature of 500&#x2013;1000&#xb0; C. for 1 to 24 hours. In the method for manufacturing the silicon wafer, moreover, the silicon wafer having the oxygen and carbon concentrations as controlled above is heat-treated at a temperature of 1100&#xb0; C.&#x2013;1380&#xb0; C. for 1 to 10 hours. The control of the oxygen and carbon concentrations in the growth of a single crystal with CZ method allows a desired density of oxygen precipitates to be attained in the process of manufacturing devices and thereby sufficient gettering efficiency to be obtained.

The invention relates to a method of producing epitaxial wafers for the manufacture of high integration density devices capable of showing stable gettering effect. Specifically, it provides (1) a method of producing epitaxial wafers which comprises subjecting a silicon wafer sliced from a single crystal ingot grown by doping with not less than 1&times;10 atoms/cm of nitrogen to 15 minutes to 4 hours of heat treatment at a temperature not lower than 700&deg; C. but lower than 900&deg; C. and then to epitaxial growth treatment. It is desirable that the above single crystal ingot have an oxygen concentration of not less than 11&times;10 atoms/cm . Further, (2) the above heat treatment is desirably carried out prior to the step of mirror polishing of silicon wafers. Furthermore, (3) it is desirable that the pulling rate be not increased in starting tail formation as compared with the pulling rate of the body in growing the above single crystal ingot. By taking these means, it is possible to produce epitaxial wafers having an almost constant, high level of gettering effect irrespective of the site of wafer slicing from the single crystal ingot and, furthermore, suppress the occurrence of defects within the epitaxial layer.

Method of producing epitaxial wafers

There are provided silicon single crystal, silicon wafer, and epitaxial wafer having a sufficient gettering effect suitable for a large-scale integrated device. The silicon single crystal which is suitable for an epitaxial wafer is grown with nitrogen doping at a concentration of 1&times;10 atoms/cm or more, or with nitrogen doping at a concentration of 1&times;10 atoms/cm and carbon doping at a concentration of 0.1&times;10 &minus;5&times;10 atoms/cm and/or boron doping at a concentration of 1&times;10 atoms/cm or more. The silicon wafer is produced by slicing from the silicon single crystal, and an epitaxial layer is grown on a surface of the silicon wafer to produce the epitaxial wafer. The present invention provides an epitaxial wafer for a large-scale integrated device having no defects in a device-active region and having an excellent gettering effect without performance of an extrinsic or intrinsic gettering treatment.

Silicon single crystal, silicon wafer, and epitaxial wafer.

Method of manufacturing silicon epitaxial wafer

A method for manufacturing semiconductor silicon epitaxial wafer and semiconductor device by which a gettering ability can be given to an epitaxial wafer in which the formation of BMD is not able to be expected in both low- and high-temperature device manufacturing processes, with the manufacturing processes being lower and higher than 1,050&deg; C. in temperature, and has a specific resistance of &gE;10 m&OHgr;&middot;cm. When this method is used, such BMD that is sufficient to obtain gettering can be formed in both the low- and high-temperature processes, with the manufacturing processes being lower and higher than 1,050&deg; C. in temperature, even in the epitaxial wafer having a specific resistance of &gE;10 m&OHgr;&middot;cm by performing low-temperature heat treatment at 650&tilde;900&deg; C. before starting epitaxial film formation, by selecting the heat-treating time in accordance with the process temperature in the device manufacturing processes and heavy-metal contaminants which are mixed in during the device manufacturing processes can be gettered sufficiently. Therefore, the characteristic deterioration of a device can be prevented and the yield of the device can be improved.

Method for manufacturing semiconductor silicon epitaxial wafer and semiconductor device

The present invention provides for a frame construction which comprises frames wherein a machining tool and functional devices for making the tool operate are mounted on separate frames, and the respective frames can run independently. The present invention also provides a machining device which utilizes the aforementioned frame construction so that machining accuracy can be maintained irrespective of the weight of the functional devices mounted on the frame.

Frame construction and a machining device provided with it

A FIG. 1 is taken by a camera having optical/electrical elements arrayed in matrix, signals of pixels of the picture taken by the camera 2 are converted into binary data in a binary circuit 11, and the binary data is temporarily stored in a binary data storage device 12. The reference point 0 is determined on the edge of the figure, and radius L of the circuit scanning line 21 is determined based on the shape of the figure, and reference point 0 and the radius L of the circle scanning line 21 are inputted through an input unit 13. Coordinate data of pixels on the circuit scanning line 21 is operated based on the inputted numeric values in an arithmetic circuit 15. Binary data on pixels corresponding to coordinate data are read in the detector 16. When the pixel corresponding to the edge of the FIG. 1 is detected, a vector directed from the reference point 0 to the pixel is decided, and first and second drives 7, 8 are driven according to the vector.

Line tracing method and apparatus therefor

A FIG. 1 is taken by a camera having optical/electrical elements arrayed in matrix, signals of pixels of the picture taken by the camera 2 are converted into binary data in a binary circuit 11, and the binary data is temporarily stored in a binary data storage device 12. The reference point 0 is determined on the edge of the figure, and plural coaxial circle scanning lines A, B about the reference point 0 which differs from each other in radius are set. In arithmetic circuit 15, coordinate data of pixels on the circle scanning lines A, B is operated. In the detector 16, binary data of the pixels on the circle scanning lines A, B is detected. In the decision circuit 17, the vectors from the reference point 0 to the detected pixels on the circle scanning lines A, N, and the vector angle between the obtained vectors is operated. A speed signal according to the vector angle is generated for driving the first and second drive 7, 8.

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Tokyo, Japan

Yasuo Koike