Kabushiki Kaisha Toshiba

Matsushita Electric Industrial Co., Ltd.

Yasunori Miyahara

Shunsuke Hirano

Hisashi Adachi

Ryoichi Yamada

Syun-ichi Anzai

Kazuo Hasegawa

Yukio Hiraoka

Hisashi Takahashi

Hiroki Kojima

Jyoji Maeda

Shin'ichiro Ishizuka

Atsumi Kuze

Syunichi Anzai

Yoshitomo Oumi

The invention concerns a wideband modulator using a PLL synthesizer, which can match the frequency characteristic and prevent degradation in modulation accuracy even in the presence of a variation in the manufacture of circuit components. In a wideband modulator which modulates the division ratio of a frequency divider by using a modulating signal generated by a modulating signal generator and outputs a modulated carrier signal from a VCO, calibration data from a calibration data generator are input via a selector. The amplitude value of an ac component of each modulating signal, either appearing on the output of a loop filter or demodulated by a demodulator, is converted to a digital value by way of an A/D converter. The difference between the two is detected and a control signal FCR to eliminate the difference is generated in order to correct the frequency characteristic of a PLL or a pre-distortion filter.

Modulator and correction method thereof

In a direction conversion receiver, a quadrature demodulator produces differential signals in a baseband on the basis of a local signal of a frequency synthesizer, with the differential signals being inputted through a first low pass filter, a gain control amplifier and an amplifier to a control unit and a direct current component between the differential signals being extracted in a second low pass filter. In addition, an offset compensating section reduces an offset voltage while the control unit outputs a control signal for the control of the gain control amplifier. The second low pass filter includes a time constant circuit for determining a time constant through the use of resistors and a capacitor, and a time constant changing section. A time constant control unit controls the time constant changing section for a predetermined period of time after the control unit outputs data for the change of a frequency of the local signal so that the time constant of the time constant circuit decreases. This shortens the time needed for the settlement of automatic gain control and prevents the deterioration of demodulation accuracy during a call.

Direct conversion receiver, mobile radio equipment using the same, and RF signal receiving method

A frequency synthesizer device comprising a PLL circuit ( ) and a frequency-division ratio control circuit ( ). The PLL circuit ( ) includes a phase comparator ( ), a low-pass filter ( ), a voltage-controlled oscillator ( ), and a variable frequency divider ( ). The frequency-division ratio control circuit ( ) controls the variable frequency divider ( ) such that a frequency division ratio of the variable frequency divider ( ) is changed in time and a time average value of the frequency division ratio contains a value below a decimal point. Two different signals of an output signal fdiv of the variable frequency divider ( ) and an output fdiv obtained via a delay element ( ) are used as clocks of an accumulator portion ( ) in the frequency-division ratio control circuit ( ). The variation in the substrate potential and the variation in the power supply voltage generated by the operation of the frequency-division ratio control circuit ( ) can be reduced, and the degradation of C/N of the frequency synthesizer can be suppressed.

Fractional-N frequency synthesizer with multiple clocks having different timings

A frequency synthesizer is provided with a prescaler and a counter which output a signal having a frequency generated by frequency-dividing an output signal of a VCO a reference frequency divider for frequency-dividing a frequency of a reference signal of a reference signal source a frequency adjusting meas operated in such that a frequency error between the output signal of the counter and the output signal of the reference frequency divider is detected, and in response to this detection result, such a signal is outputted by which either a capacitor value or an inductor value employed in a resonant circuit of the VCO is switched; and also a bias control means for applying an arbitrary voltage V to a control voltage terminal of the VCO so as to bring an output signal of a charge pump into a high impedance state when the frequency adjusting means is operated. Since the resonant frequency of the resonant circuit is changed in response to an actual oscillation frequency of the VCO the frequency synthesizer can be phase-locked at a desirable frequency. Also, since the VCO can be manufactured in the IC form, the compact VCO can be made in low cost.

Method and apparatus for synthesizing high-frequency signals for wireless communications

The present invention discloses a single-ended signals to differential signals converter. In this invention, a first circuit comprising a transistor outputting single-ended signals and a first spiral inductor connected as an inductor for load use that contributes in determining frequency characteristics of a first circuit to either one of output terminals of higher voltage side and lower voltage side of the transistor, and a second circuit comprising a pair of differential input terminals for inputting differential signals and a second spiral inductor that is magnetically coupled with the first spiral inductor, and both ends thereof are connected to the differential input terminals, respectively, are formed within a monolithic integrated circuit.

Single-ended signals to differential signals converter

A broadcasting system discriminating television receiver including a circuit for evaluating the output of an FM demodulator, a circuit for evaluating the output of an I/Q wave detector, and a controller for controlling a switch based on the results of each evaluation. The switch is used primarily to determine whether the output of the receiver is analog or digital.

Broadcasting system discriminating television receiver for

A television receiver having an input section for splitting a reception signal to a first signal and a second signal, first and second mixers for respectively receiving the split reception signals, a local oscillator for outputting first and second local oscillation signals, a 90.degree. phase shifter for providing the first local oscillation signal to another input of the first mixer after phase-shifting by 90.degree., a first output section for directly extracting outputs from the first and the second mixers, and a second output section for outputting a second output obtained by adding a direct output from the first mixer and the output from the second mixer which has passed through another 90.degree. phase shifter.

Television receiver being driven by either analog broadcasting signals

A broadcasting system discriminating television receiver includes a circuit which applies the FM demodulation discrimination on the output of the FM demodulator in an analog broadcasting, or a circuit which applies a video signal discrimination on a video output which is connected to a circuit which applies an I/Q wave detection on the output of an I/Q detector or a circuit which applies a video signal discrimination on a video output, and means for controlling a signal selector switch (SW) after the channel selector judging from the result of the discriminator.

An automatic gain control (AGC) detection circuit. The AGC detection circuit includes; a current source, first to fourth transistors whose emitters are connected in common to the current source, a reference voltage source for supplying the bases of the first and the second transistors with a reference voltage, input terminal means connected to the bases of the third and the fourth transistors for receiving an input signal, a power supply source for supplying the first to fourth transistors with a power supply voltage, first collector load means connected between the power supply source and a node connecting the collectors of the first and second transistors in common, second collector load means connected between the power supply source and another node connecting the collectors of the third and fourth transistors in common, and an output terminal means connected between the nodes for taking out an automatic gain control detection output.

Growing community of inventors

Ayase, Japan

Yasunori Miyahara