Olympus Corporation

Denso Corporation

Olympus Imaging Corporation

Yasunari Harada

Masato Osawa

Hideki Kato

Shuzo Hiraide

Yoshio Hagihara

Satoru Adachi

Takamoto Watanabe

Yuichi Gomi

Kenichi Miyasako

Susumu Yamazaki

Yusaku Koyama

Hisashi Takeuchi

In an imaging system, a video output circuit is configured to convert an analog video signal into digital data and output serial data including the digital data to a signal line on the basis of a serial clock having a higher frequency than a frequency of the camera clock. A camera-clock generation circuit is configured to generate the camera clock synchronized with the system clock output to the signal line. A serial-clock generation circuit is configured to generate the serial clock synchronized with the system clock output to the signal line. A system-clock output circuit is configured to output the system clock to the signal line in a blanking period.

Imaging system and endoscope

An imaging apparatus includes: an imager configured to generate an imaging signal; a transmission channel configured to connect a controller and the images; a superimposed signal generator that is arranged on a proximal end side of the transmission channel, the superimposed signal generator being configured to generate a superimposed signal by superimposing a pulsed data signal and a pulsed reference clock signal, and output the generated superimposed signal to the transmission channel; a first extractor that is arranged on a distal end side of the transmission channel, the first extractor being configured to extract the data signal and the reference clock signal from the generated superimposed signal; and a second extractor that is arranged on the distal end side of the transmission channel, the second extractor being configured to extract the negative voltage from the generated superimposed signal.

Imaging apparatus, imaging system, and imaging method

In an AD converter, a first capacitor DAC circuit performs a first operation in parallel with a second operation by a second capacitor DAC circuit, and the first capacitor DAC circuit performs the second operation in parallel with the first operation by the second capacitor DAC circuit. Electric charge corresponding to an input signal is sampled in the first operation. AD conversions are sequentially performed on the basis of the electric charge sampled in each first capacitor included in a plurality of first capacitors or each second capacitor included in a plurality of second capacitors in the second operation. The first capacitor DAC circuit and the second capacitor DAC circuit alternately perform the first operation and the second operation.

Ad converter and image sensor

An imaging element includes: a plurality of pixels where each pixel is configured to generate an imaging signal; a noise eliminating circuit configured to eliminate a noise component included in the imaging signal; a plurality of column source follower buffers where each column source follower buffer is configured to amplify the imaging signal from which the noise component has been eliminated by the noise eliminating circuit, and output the amplified signal; a horizontal scanning circuit configured to sequentially select the column source follower buffer and output the imaging signal; and a buffer circuit which is connected with the column source follower buffer sequentially selected by the horizontal scanning circuit to form a voltage follower circuit, the buffer circuit being configured to perform impedance conversion on a voltage of the imaging signal output from the column source follower buffer, and output the converted signal to an outside.

Imaging element, imaging device, and endoscope

In an AD converter, a first DAC circuit performs a first operation in parallel with a second operation performed by a second DAC circuit, and the first DAC circuit performs the second operation in parallel with the first operation performed by the second DAC circuit. In the first operation, electric charge corresponding to an input signal of the first DAC circuit or an input signal of the second DAC circuit is sampled. In the second operation, an AD conversion is sequentially performed on the basis of the electric charge sampled in the first operation. The first DAC circuit and the second DAC circuit alternately perform the first operation and the second operation.

A disclosed analog-to-digital converter includes; a sampling circuit to sample a pair of analog signals as a differential input signal; a binary capacitance holding the sampled pair of analog signals and reflecting a level of a reference signal to the analog signals through the binary capacitance to generate a pair of voltage signals; a comparator including a transistor to which the voltage signals are input, to compare one of the voltage signals with the other; a correction circuit provided previously to the comparator, to output to the comparator the pair of voltage signals in which voltage dependency of stray capacitance in the input transistor is cancelled; and a controller that successively determines a value of each bit of a digital signal corresponding to the binary capacitance based on a comparison by the comparison circuit, and reflects the value of each bit of the digital signal to the reference signal.

Successive approximation A/D converter, imaging device, endoscope, and setting method

An A/D converter includes: a first wiring layer including a first A/D conversion circuit including a first capacitor group in which a plurality of weighted unit capacitors are connected in parallel and a second capacitor group in which a plurality of unit capacitors are connected in parallel, the second capacitor group being connected in parallel with the first capacitor group; and a second wiring layer including a second A/D conversion circuit including a third capacitor group in which a plurality of weighted unit capacitors are connected in parallel and a fourth capacitor group in which a plurality of unit capacitors are connected in parallel, the fourth capacitor group being connected in parallel with the third capacitor group, in which the first wiring layer and the second wiring layer are stacked such that the first A/D conversion circuit and the second A/D conversion circuit are disposed at overlapping positions.

A/D converter and A/D conversion device

A semiconductor device includes a pixel array, a plurality of column circuits, an amplifier, switch arrays of a first layer to an nlayer, and signal lines of the first layer to the nlayer. n is an integer of two or more. The switch array of an ilayer is disposed between the switch array of an (i+1)layer and the amplifier. i is an integer of one or more and less than n. The signal line of the first layer is connected to the namplifier. The signal line of the nlayer is connected to the switch array of the nlayer. Each of the plurality of switches included in the switch array of the nlayer is connected to the column circuit.

Semiconductor device

A semiconductor device is provided that includes an amplification circuit, a downstream circuit, and a clipping circuit. The amplification circuit includes a sampling capacitor, a feedback capacitor, and an operational amplifier circuit. The sampling capacitor holds air input signal on which sampling is performed, as a signal whose reference is a first reference voltage. The signal that is held in the sampling capacitor is transferred to the feedback capacitor. The operational amplifier circuit amplifies the signal that is held in the sampling capacitor, according to a ratio between values of the sampling capacitor and the feedback capacitor, and outputs the amplified signal, as a signal whose reference is a second reference voltage. The clipping circuit limits a voltage of an output signal of the operational amplifier circuit to a predetermined voltage or below.

There is provided a method of driving a solid-state imaging device, the solid-state imaging device including a plurality of column circuits which are arranged for each column of pixels and an amplification and selection circuit configured to amplify a differential signal based on a column pixel signal and a column reset signal, the method including causing the amplification and selection circuit to perform at least two operations among a first operation of sampling the column pixel signal, a second operation of sampling the column reset signal, and a third operation of output the amplified differential signal in parallel in the same period; and causing components connected to different horizontal signal lines to perform operations corresponding to the first to third operation in that order, and causing the components to perform different operations in parallel in the same period with respect to the first to third operations.

Driving method for solid-state imaging device, and solid-state imaging device

A successive approximation type A/D conversion circuit includes a first capacitor circuit, a second capacitor circuit, a plurality of comparison circuits, a determination circuit, and a control circuit. The determination circuit counts a first number of first state and a second number of second state with respect to a plurality of first digital signals output from the plurality of comparison circuits. The determination circuit outputs a control signal for stopping the plurality of comparison circuits to the control circuit when an absolute value of a difference between the first number and the second number is equal to or smaller than 1. The control circuit stops the plurality of comparison circuits on the basis of the control signal.

Successive approximation type A/D conversion circuit

In a semiconductor device, a first variable gain amplifier and a second variable gain amplifier constitute a switched capacitor type variable gain amplifier. A selection switch switches connection among the first variable gain amplifier, the second variable gain amplifier, and a load circuit such that the first variable gain amplifier and the load circuit are connected to each other when an amplification factor of the first variable gain amplifier is a predetermined gain or less, and the second variable gain amplifier is connected between the first variable gain amplifier and the load circuit when the amplification factor of the first variable gain amplifier is larger than the predetermined gain.

Semiconductor device with improved variable gain amplification

A successive comparison A/D conversion circuit includes: an comparison circuit including a differential amplification circuit which includes a pair of differential input terminals, amplifies a pair of first differential signals input into the pair of differential input terminals, and outputs a pair of second differential signals, and a latch circuit which compares voltages of the second differential signals output from the differential amplification circuit, retains an comparison result, and outputs the retained comparison result; a digital circuit which generates a digital signal corresponding to the first differential signal, based on the comparison result; an arithmetic circuit which generates a reference signal based on the digital signal, generates the first differential signal by subtracting the reference signal from a third differential signal or adding the reference signal to the third differential signal, and outputs the generated first differential signal to the pair of differential input terminals; and a control circuit.

Successive comparison A/D conversion circuit

An instrumentation amplifier includes: a first input stage configured to shift a level of a first input voltage applied to a first input terminal and to output the level-shifted voltage; a second input stage configured to shift a level of a second input voltage applied to a second input terminal and to output the level-shifted voltage; a first resistor configured to generate a differential current corresponding to a difference between the voltage output from the first input stage and the voltage output from the second input stage; a second resistor configured to convert the differential current into a first output voltage; a third resistor configured to convert the differential current into a second output voltage; a first output stage configured to output the first output voltage from a first output terminal; and a second output stage configured to output the second output voltage from a second output terminal.

Instrumentation amplifier

A shake detector includes: a shake detection unit that detects an amount of shake, and outputs a shake detection signal and a reference signal; a signal processing unit that amplifies and smoothes the shake detection signal and the reference signal, and outputs the shake detection signal as a signal used in subsequent processing; an adjustment unit that outputs an adjustment signal for adjusting an output signal from the signal processing unit; and a control operation unit that, in a first period for which there is no shake in the imaging apparatus, stores a control value for controlling the adjustment unit on the basis of the reference signal, and that, in a second period different from the first period, generates a control signal for controlling the adjustment unit on the basis of the reference signal and the stored control value and outputs the control signal.

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Ebina, Japan

Yasunari Harada