Sony Corporation

Nikon Corporation

Yasuhito Maki

Tadakuni Narabu

Satoshi Yoshihara

Maki Sato

Tetsuya Kondo

Tadao Takagi

Tetsuro Goto

Hiroyuki Iwasaki

Masahide Hirama

Seiichi Kawamoto

Katsunori Noguchi

Yoshiharu Nakajima

Toshikazu Maekawa

Hideo Nomura

Shinya Yoshida

Motoaki Abe

Minoru Yasuda

Mitsuru Tateuchi

Akio Izumi

Go Yamanaka

Masafumi Matsui

Katsuyuki Saito

Takaji Otsu

A display apparatus includes: at least one pixel section including a display cell that has a pixel electrode and a light-receiving cell that has a light-receiving element; and a shielding electric conductor configured to electrically shield the pixel electrode on the side of the display cell from the light-receiving element. The shielding electric conductor is formed between the pixel electrode and the light-receiving element and has a fixed potential.

Display apparatus and electronic apparatus

When a signal output by a solid-state image sensing device is clamped to a predetermined reference potential, a high voltage generated in a transfer suspension period after the clamping as generally supplied to an A/D converter is generated. A sample/hold output Va is clamped to a clamp level Vref over a period of time between a halfway point of time of a signal of a picture element preceding ahead by one line and the end of an inhibit period of transfer clocks of a signal output by an empty transmission unit via a first clamp pulse and a sample/hold output for the second picture element, or a subsequent one of an OPB unit is clamped to the clamp level via a second clamp pulse to prevent a signal output from exceeding a reference voltage from being supplied to an A/D converter at a later stage.

Solid-state image sensing device

When a signal output by a solid-state image sensing device is clamped to a predetermined reference potential, a high voltage generated in a transfer suspension period after the clamping as generally supplied to an A/D converter is generated. A sample/hold output Va is clamped to a clamp level Vref over a period of time between a halfway point of time of a signal of a picture element preceding ahead by one line and the end of an inhibit period of transfer clocks of a signal output by an empty transmission unit via a first clamp pulse and a sample/hold output for the second picture element, or a subsequent one of an ORB unit is clamped to the clamp level via a second clamp pulse to prevent a signal output from exceeding a reference voltage from being supplied to an A/D converter at a later stage.

A timing generation circuit () is formed integrally on the same glass substrate () together with a display area section () similarly to an H driver (U) and a V driver (), and timing pulses to be used by the H driver (U) and the V driver () are produced based on timing data produced by a shift register (U) of the H driver (U) and a shift register (A) of the V driver (). The invention thereby provides a timing generation circuit which can contribute to miniaturization and reduction of the cost of the set and a display apparatus of the active matrix type in which the timing generation circuit is incorporated.

Timing generation circuit for display apparatus and display apparatus incorporating the same

A comparator which can operate stably against an absolute value distribution of a threshold voltage among MOS transistors and has a wide allowable range against the threshold voltage dispersion and besides allows reduction in power consumption. The comparator employs a single MOS transistor, and a resistance element is connected between the drain electrode of the MOS transistor and a power supply. A capacitor is connected between the gate electrode of the MOS transistor and a dc potential point, and a switch is connected between the gate electrode and the drain electrode. A comparison reference level and comparison input data are inputted in a time series to the source electrode of the MOS transistor, and the MOS transistor performs a comparation operation.

Comparator, display apparatus using comparator for driving system, and driving method for comparator

When a signal output by a solid-state image sensing device is clamped to a predetermined reference potential, a high voltage generated in a transfer suspension period after the clamping is generally supplied to an A/D converter as generated. A sample/hold output Va is clamped to a clamp level Vref over a period of time between a halfway point of time of a signal of a picture element preceding ahead by one line and the end of an inhibit period of transfer clocks of a signal oputput by an empty transmission unit via a first clamp pulse and a sample/hold output for the second picture element, or a subsequent one of an OPB unit is clamped to the clamp level via a second clamp pulse to prevent a signal output from exceeding a reference voltage from being supplied to an A/D converter at a later stage.

An adaptive peak value detector, wherein the peak value for a peak hold section is detected, the peak hold section being selected by a peak hold control circuit. A solid-state imaging sensor generates pixel signals representative of an image and the peak value of portions of the pixel signals is detected. The exposure time of the sensor is adjusted as a function of the detected peak value and auto-focusing of the image for the camera is carried out on the basis of the image received during the adjusted exposure time.

System for performing selective detection of image signal peaks and camera employing the system

In a floating diffusion output type or a floating gate output type charge-to-voltage converter, the floating diffusion or the floating gate is coupled to one or more diffusion regions by means of one or more switch elements, and such elements are selectively turned on or off in such a manner that the the charge-to-voltage conversion factor is raised to obtain a great voltage amplitude when a small quantity of signal charge is input, or the conversion factor is lowered to obtain a small voltage amplitude when a large quantity of signal charge is input.

Charge-to-voltage converter with adjustable conversion factor

Peak hold method and apparatus for detecting a peak value from a

A solid state image pickup device comprising; a sensor section having a plurality of light-receiving regions arranged in plurality in which each of the light-receiving regions converts an incident light into signal charges of an amount corresponding to the amount of light, a charge transfer register for transferring the signal charges read out from each of the light-receiving regions of the sensor section, a charge discharging section for discharging charges stored in each of the light-receiving regions of the sensor section, and a control means for controlling such that charge stored in each of the light-receiving regions are discharged to the charge discharging section within a predetermined period of time upon rising of the power supply.

Growing community of inventors

Kanagawa, Japan

Yasuhito Maki