Panasonic Corporation

Matsushita Electric Industrial Co., Ltd.

Matsushita Electronics Corporation

Panasonic Intellectual Property Management Co., Ltd.

Other

Yasuhiro Uemoto

Tsuyoshi Tanaka

Manabu Yanagihara

Yoshihisa Nagano

Masahiro Hikita

Eiji Fujii

Tetsuzo Ueda

Daisuke Ueda

Yasuhiro Shimada

Atsuo Inoue

Akihiro Matsuda

Koji Arita

Hiroaki Ueno

Tatsuo Morita

Yutaka Hirose

Toru Nasu

Taketoshi Matsuura

Masamichi Azuma

Tatsuo Otsuki

Tomohiro Murata

Hidetoshi Ishida

Hideyuki Okita

Kazushi Nakazawa

Yasufumi Izutsu

Tooru Nasu

Tatsuo Ootsuki

Yuji Judai

Ayanori Ikoshi

Atsuhiko Kanda

Shinitirou Hayashi

Koichi Arita

Masaki Kibe

Akihiko Nishio

Kaoru Inoue

Takashi Miura

Shinichiro Hayashi

Takahiro Sato

Daisuke Shibata

Yoshito Ikeda

Kazuhiro Yahata

Toshie Kutsunai

Hiroto Yamagiwa

Naohiro Tsurumi

Kouichi Ishikawa

Katsushige Yamashita

Hidenori Takeda

Shingo Hashizume

Matsuo Shiraishi

Atsushi Morimoto

Carlos Alberto Paz De Araujo

Manabu Inoue

Michael C Scott

Joseph D Cuchiaro

Satoshi Nakazawa

Kazuhiro Kaibara

Akira Nakamura

Hisayoshi Matsuo

Kazunori Kobayashi

Atsuya Yamamoto

Fumiaki Emoto

Eigi Fujii

Satoru Ouchi

Yoshihiro Shimada

Kohji Senda

A nitride semiconductor device including a substrate, a channel layer, a carbon-poor barrier layer having a recess, a carbon-rich barrier layer disposed over the recess and the carbon-poor barrier layer, and a gate electrode above the recess, wherein the carbon-poor and carbon-rich barrier layers have bandgaps larger than that of the channel layer, the upper surface of the carbon-rich barrier layer includes a first main surface including a source electrode and a drain electrode, and a bottom surface of a depression disposed along the recess, and side surfaces of the depression connecting the first main surface to the bottom surface of the depression, and among edges of the depression of the carbon-rich barrier layer which are boundaries between the first main surface and the side surfaces of the depression, the edge of the depression of the carbon-rich barrier layer closest to the drain electrode is covered with the gate electrode.

Nitride semiconductor device and method of manufacturing the same

A semiconductor device having: a substrate; a nitride semiconductor layer including a first semiconductor layer made of GaN or InGaN (0&#x3c;x&#x2266;1) and formed on the substrate and a second semiconductor layer containing Al and formed on the first semiconductor layer; and a protective film formed on the set of nitride semiconductor layers. The nitride semiconductor layer has an active section and an inactive section surrounding the active section, and a portion of the second semiconductor layer has been removed from the inactive section.

Semiconductor device composed of AlGaInN layers with inactive regions

A nitride semiconductor device includes: a substrate; a first nitride semiconductor layer () located over the substrate; a second nitride semiconductor layer () located over the first nitride semiconductor layer (), having a larger band gap than the first nitride semiconductor layer (), and having a recess () penetrating into the first nitride semiconductor layer (); and a third nitride semiconductor layer () continuously covering the second nitride semiconductor layer () and the recess (), and having a larger band gap than the first nitride semiconductor layer (); a gate electrode () located above a portion of the third nitride semiconductor layer () over the recess (); and a first ohmic electrode () and a second ohmic electrode () located on opposite sides of the gate electrode ().

Nitride semiconductor device and method for manufacturing same

A semiconductor device includes a substrate, a first nitride semiconductor layer formed on the substrate, a p-type nitride semiconductor layer formed on the first nitride semiconductor layer, a recess having a bottom portion which reaches the first nitride semiconductor layer through a part of the p-type nitride semiconductor layer, a third nitride semiconductor layer formed to cover the bottom portion of the recess, a side portion of the recess, and a part of an upper surface of the p-type nitride semiconductor layer. The semiconductor device further includes a fourth nitride semiconductor layer formed on the third nitride semiconductor layer, a first electrode formed on another side of the substrate, a gate electrode formed on the upper surface of the p-type nitride semiconductor layer, and a second electrode that is in contact with the third nitride semiconductor layer or the fourth nitride semiconductor layer. The third nitride semiconductor layer has a bandgap different from a bandgap of the fourth nitride semiconductor layer.

Group III nitride semiconductor device which can be used as a power transistor

A semiconductor device includes a semiconductor layer stackformed on a substrateand having a channel region, a first electrodeA and a second electrodeB formed spaced apart from each other on the semiconductor layer stacka first gate electrodeA formed between the first electrodeA and the second electrodeB, and a second gate electrodeB formed between the first gate electrodeA and the second electrodeB. A first control layerA having a p-type conductivity is formed between the semiconductor layer stackand the first gate electrodeA.

Semiconductor device and method for driving the same

A semiconductor device includes: a first nitride semiconductor layer; a second nitride semiconductor layer above the first nitride semiconductor layer and having a band gap larger than that of the first nitride semiconductor layer; a p-type nitride semiconductor layer above the second nitride semiconductor layer; two third nitride semiconductor layers of n-type above the second nitride semiconductor layer and located separately on either side of the p-type nitride semiconductor layer; and a first ohmic electrode above one of the two third nitride semiconductor layers and a second ohmic electrode above the other of the two third nitride semiconductor layers; and a gate electrode above the p-type nitride semiconductor layer. The second nitride semiconductor layer includes, in a region above which neither the p-type nitride semiconductor layer nor the two third nitride semiconductor layers is located, a surface layer including p-type impurities identical to those in the p-type nitride semiconductor layer.

Semiconductor device and method of manufacturing semiconductor device

An AlN buffer layer, an undoped GaN layer, an undoped AlGaN layer, a p-type GaN layer and a heavily doped p-type GaN layer are formed in this order. A gate electrode forms an Ohmic contact with the heavily doped p-type GaN layer. A source electrode and a drain electrode are provided on the undoped AlGaN layer. A pn junction is formed in a gate region by a two dimensional electron gas generated at an interface between the undoped AlGaN layer and the undoped GaN layer and the p-type GaN layer, so that a gate voltage can be increased.

Field-effect transistor with nitride semiconductor and method for fabricating the same

A bidirectional switching device includes a semiconductor multilayer structure made of a nitride semiconductor, a first ohmic electrode and a second ohmic electrode which are formed on the semiconductor multilayer structure, and a first gate electrode and a second gate electrode. The first gate electrode is covered with a first shield electrode having a potential substantially equal to that of the first ohmic electrode. The second gate electrode is covered with the second shield electrode having a potential substantially equal to that of the second ohmic electrode. An end of the first shield electrode is positioned between the first gate electrode and the second gate electrode, and an end of the second shield electrode is positioned between the second gate electrode and the first gate electrode.

Bidirectional switching device and bidirectional switching circuit using the same

A transistor includes a first semiconductor layer formed on a substrate, a second semiconductor layer formed on the first semiconductor layer and has a band gap larger than that of the first semiconductor layer, a control layer formed on the second semiconductor layer and contains p-type impurities, a gate electrode formed in contact with at least part of the control layer and a source electrode and a drain electrode formed on both sides of the control layer, respectively. A third semiconductor layer made of material having a lower etch rate than that of the control layer is formed between the control layer and the second semiconductor layer.

Transistor

A two-wire AC switch suppressing heat from a bidirectional switch element inside the switch is provided. The two-wire AC switchconnected between an AC power supplyand a loadincludes: a bidirectional switch elementwhich flows passing current bi-directionally, selects whether to flow or block the current, is connected in series with the AC power supplyand the loadto form a closed-loop circuit, and is made of a group-III nitride semiconductor; a full-wave rectifierperforming full-wave rectification on power supplied from the AC power supply; a power supply circuitsmoothing a voltage after the full-wave rectification to generate DC power; a first gate drive circuitand a second gate drive circuiteach outputting a control signal to the bidirectional switch element; and a control circuitcontrolling the first and second gate drive circuitsand

Two-wire AC switch

A bidirectional switch includes a plurality of unit cellsincluding a first ohmic electrode, a first gate electrode, a second gate electrode, and a second ohmic electrode. The first gate electrodesare electrically connected via a first interconnectionto a first gate electrode pad. The second gate electrodesare electrically connected via a second interconnectionto a second gate electrode pad. A unit cellincluding a first gate electrodehaving the shortest interconnect distance from the first gate electrode padincludes a second gate electrodehaving the shortest interconnect distance from the second gate electrode pad

Semiconductor device

A semiconductor device includes a first transistor formed on a first element region, and a first protecting element including a second transistor formed on a second element region. A second protecting element ohmic electrode is connected to a first gate electrode, a first protecting element ohmic electrode is connected to a first ohmic electrode, and a first protecting element gate electrode is connected to at least one of the first protecting element ohmic electrode and the second protecting element ohmic electrode. The second element region is smaller in area than the first element region.

A semiconductor device includes: a semiconductor chip; a protective film and an insulating film sequentially stacked over the semiconductor chip, and each having openings that expose source, drain, and gate pads; a heat dissipation terminal made of a material having a higher thermal conductivity than the insulating film; connection terminals formed on the source, drain, and gate pads and surrounded by the insulating film; and a mount substrate having connection pads. The semiconductor chip has a source electrode having a plurality of source fingers, a drain electrode having a plurality of drain fingers, and a gate electrode having a plurality of gate fingers. The source, drain, and gate pads are connected to the source electrode, the drain electrode, and the gate electrode, respectively. The connection terminals are respectively connected to the connection pads. The heat dissipation terminal is in close contact with the mount substrate.

Semiconductor device and manufacturing method thereof

A semiconductor device includes a semiconductor layer stack formed on a substrate, a first ohmic electrode and a second ohmic electrode which are formed on the semiconductor layer stack, and are spaced from each other, a first control layer formed between the first ohmic electrode and the second ohmic electrode, and a first gate electrode formed on the first control layer. The first control layer includes a lower layer, an intermediate layer which is formed on the lower layer, and has lower impurity concentration than the lower layer, and an upper layer which is formed on the intermediate layer, and has higher impurity concentration than the intermediate layer.

Bidirectional switch

Growing community of inventors

Shiga, Japan

Yasuhiro Uemoto