Kioxia Corporation

Yasuhiro Uchimura

Tatsufumi Hamada

Shinichi Sotome

Tomohiro Kuki

Yasunori Oshima

Osamu Arisumi

According to one embodiment, in a semiconductor storage device, during an erasing operation, a voltage supplied to at least one of a first wiring and a second wiring is set as a first voltage, and a voltage supplied to a first conductive layer is set as a second voltage. The erasing operation includes a first operation period in which the first voltage is increased from a first reference voltage to a first erase voltage and the second voltage is increased from a second reference voltage to a second erase voltage. In a second operation period of the erasing operation, the first voltage is maintained at the first erase voltage and the second voltage is decreased from the second erase voltage to the second reference voltage (or a first level voltage larger than the second reference voltage) after the first operation period.

Semiconductor storage device

According to one embodiment, a memory device includes a substrate; a structure including a plurality of conductive layers stacked on the substrate; and a pillar arranged inside the structure and including a semiconductor layer that extends in a direction perpendicular to a surface of the substrate. The semiconductor layer includes a first portion on a side of an upper portion of the structure, and a second portion between the first portion and the substrate. The first portion has a thickness larger than a thickness of the second portion.

Memory device

According to one embodiment, a semiconductor memory device includes a base layer, conductive layers, an insulation layer, a semiconductor layer and a charge storage layer. The conductive layers are stacked above the base layer in a first direction. The insulation layer is extending in the conductive layers in the first direction. The semiconductor layer is arranged between the insulation layer and the conductive layers. The charge storage layer is arranged between the semiconductor layer and the conductive layers. The insulation layer includes a first insulation layer arranged on a side of the base layer and containing polysilazane and a second insulation layer arranged on the first insulation layer on a side opposite from the base layer.

Growing community of inventors

Yokkaichi, Japan

Yasuhiro Uchimura