Renesas Electronics Corporation

Jfe Steel Corporation

Yasuhiro Nishimura

Kinya Ohtani

Noriaki Kohsaka

Kenji Kawamura

Kenji Okada

Hiroyuki Masuoka

Masaki Koba

Hiromi Yoshitomi

Seisuke Tsuda

Noriaki Mukaide

Provided are a high-yield-ratio high-strength galvanized steel sheet and a method for manufacturing thereof. The high-yield-ratio high-strength galvanized steel sheet has a steel sheet having a specified chemical composition and a metallographic structure including, in terms of area ratio, in terms of area ratio, 15% or less of ferrite, 20% or more and 50% or less of martensite, and bainite and tempered martensite in a total amount of 30% or more, and a galvanized layer formed on the steel sheet having a coating weight of 20 g/mto 120 g/mper side, in which a yield strength ratio is 65% or more, a tensile strength is 950 MPa or more, and Mn oxides are contained in the galvanized layer in an amount of 0.015 g/mto 0.050 g/m.

High-yield-ratio high-strength galvanized steel sheet and method for manufacturing the same

A high-strength steel sheet having a tensile strength of at least 780 MPa and excellent punchability comprises a ferrite phase, a martensite phase, and a bainite phase. The area ratio of the martensite phase is 20%-50%; the area ratio of crystal grains having an average crystal grain diameter of less than 1.0 &#x3bc;m in the martensite phase is 5%-30%; the area ratio of crystal grains having an average crystal grain diameter of 1.0-4.0 &#x3bc;m is 70%-95%; and the area ratio of crystal grains having an average crystal grain diameter of more than 4.0 &#x3bc;m is less than 5%.

High-strength steel sheet and production method therefor

A high-strength steel sheet having excellent punchability and a tensile strength of at least 780 MPa has a steel structure containing, by area ratio, 70%-90% ferrite phase and 10%-30% martensite phase. The non-recrystallized ferrite content in the ferrite phase is 30%-50% and the ratio of crystal grains having an aspect ratio of 1.0-1.5 in the martensite phase is 40%-100%, by area ratio.

In order to improve the performance of a semiconductor device, a p type impurity is ion implanted into an area of an n type semiconductor film that is epitaxially grown over a p type semiconductor substrate, and the p type impurity is not ion implanted into an area of the n type semiconductor film, which is adjacent to the area in which the p type impurity is ion implanted. In this way, a ptype drift layer comprised of the area in which the p type impurity is introduced, as well as an ntype semiconductor region comprised of the area in which the p type impurity is not introduced are formed.

Semiconductor device manufacturing method and semiconductor device

A semiconductor device SD includes a substrate SUB, a plurality of gate electrodes GE, a gate pad GEP, and gate interconnects GINC. The plurality of gate electrodes GE are formed in the substrate SUB, and extend electrically in parallel to each other. The gate pad GEP is formed in a region different from that in which the plurality of gate electrodes GE are formed in the substrate SUB. Each of a plurality of gate interconnects GINC connects the plurality of gate electrodes GE to the gate pad GEP.

Growing community of inventors

Tokyo, Japan

Yasuhiro Nishimura