Nec Corporation

Sony Olympus Medical Solutions Inc.

Yasuhiro Nishigaki

A medical control device includes: a first clock generation unit configured to generate a first clock; a first synchronization signal generation unit configured to generate a first synchronization signal based on the first clock; a second clock generation unit configured to generate a second clock; and a second synchronization signal generation unit configured to generate a second synchronization signal for operating the medical observation device based on the first synchronization signal and the second clock, wherein the second synchronization signal generation unit is configured to individually execute: a first setting process of setting a transition timing; and a second setting process of setting a transition timing.

Medical control device and medical observation system

A control device includes: generation circuitry configured to output a field signal to a medical imaging device; first detection circuitry configured to detect a horizontal synchronization signal from video data output from the medical imaging device, the video data including at least the horizontal synchronization signal; and a monitoring circuitry configured to monitor whether or not an abnormality occurs in one frame period of the video data based on a period of the horizontal synchronization signal detected by the first detection circuitry for a predetermined n-th time after polarity of the field signal is switched.

Control device, medical observation system, control method, and computer readable recording medium

An information processing device according to the present invention includes an operation unit that outputs an access request, a storage unit including a plurality of connection ports and a plurality of memories capable of a simultaneous parallel process that has an access unit of a plurality of word lengths for the connection ports, and a memory access control unit that distributes a plurality access addresses corresponding to the access request received for each processing cycle from the operation unit, and generates an address in a port including a discontinuous word by one access unit for each of the connection ports.

Information processing device, memory access control device, and address generation method thereof

A buffer circuit includes a storage unit having a first storage capacity that stores data based on a write request inputted from an outside and outputs the data in an order in which the data was written, based on a read request inputted from the outside. And a second storage capacity in the first storage capacity which is used to store the data is adjusted based on an amount of valid data which has been written into the storage unit but has not been read from the storage unit.

Growing community of inventors

Tokyo, Japan

Yasuhiro Nishigaki