Fujitsu Corporation

Fujitsu Vlsi Limited

Yasuhiro Nakaoka

Mitsuo Higuchi

Kiyonori Ogura

Kohji Shimbayashi

A programmable logic device includes: a programmable AND array; an OR array operatively connected to the AND array; a plurality of external terminals; and a plurality of cell blocks operatively connected to the AND array and OR array and provided for each of the plurality of external terminals, each receiving two output signals from the OR array and outputting a signal to a corresponding external terminal based on the two output signals. By controlling an input/output of an input signal and an internally produced signal and a feedback thereof to the AND array, it is possible to realize various logic constitutions and develop a degree of freedom of the logic design in the entire device.

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Kawasaki, Japan

Yasuhiro Nakaoka