Matsushita Electric Industrial Co., Ltd.

Yasuhiro Ishiyama

Ikuo Fuchigami

Ken Kawai

Yoichi Nishida

Tomoo Kimura

Tomonori Kataoka

A semiconductor designing apparatus capable of effectively performing a layout designing operation and capable of developing both a circuit designing operation and a layout designing operation at the same time is provided. When a layout designing operation as to a semiconductor memory circuit and a semiconductor analog circuit is manually carried out in a semi-automatic designing manner, both the circuit designing operation and the layout designing operation can be carried out at the same time, so that a designing time period can be shortened.

Semiconductor designing apparatus using sub-circuit recognizer

A semiconductor device of the present invention comprises a first semiconductor chip that includes a first internal circuit and at least one first conductive pad which is provided on its upper surface and is not connected to the first internal circuit, a second semiconductor chip provided on the first semiconductor chip that includes a second internal circuit and at least one second conductive pad which is provided on its upper surface and is connected to the second internal circuit, at least one first connecting member for connecting between the second semiconductor chip provided on the first semiconductor chip, at least one first conductive pad and at least one second conductive pad, and at least one second connecting member led from at least one first conductive.

Semiconductor device, method for designing the same and recording medium that can be read by computer in which program for designing semiconductor device is recorded

In the circuit operation verifying method, initialization includes inputting circuit diagram data (a net list), specification information on respective circuit elements, and input data representing waveforms with time of voltages or currents used for operation simulation, and storing the circuit diagram data to memory. Operation of a semiconductor circuit to be verified is simulated using the circuit diagram data and the input data, and momentary voltage/current values at input terminals and the like of the circuit elements are stored in the memory. During the operation simulation, whether or not the circuit elements satisfy their voltage/current specifications and time specifications are concurrently verified based on the voltage/current values stored in the memory.

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Shiga, Japan

Yasuhiro Ishiyama