Fujitsu Corporation

Yasuhiro Aso

Satoshi Kakuma

Masami Murayama

Yoshihiro Uchida

Shuji Yoshimura

Naoyuki Izawa

Shiro Uriu

Hiroshi Miyake

Yoshihiro Watanabe

Yoshiharu Kato

Takashi Hatano

Kenichi Okabe

Mikio Nakayama

Jun Itoh

Naoki Aihara

Jin Abe

Noriko Samejima

Hiroshi Nishida

Eiji Ishioka

Shigeru Sekine

Satoshi Esaka

Miyuki Kawataka

Yoshiyuki Karakawa

Fumio Hirase

Yasuhiro Nishikawa

Shinichi Araya

Nobuyuki Tsutsui

Atsushi Kagawa

Atsuko Suzuki

Hiromi Yamanaka

Shouji Kohira

Yoshihisa Tsuruta

Atsuhisa Takahashi

Yasusi Kobayasi

Yumiko Kato

Yasusi Kobayashi

Shurji Yoshimura

A switch station including an ATM switch; a memory storing control data for operations of the switch station; an intra-station device, accommodating a subscriber line, performing communication operation on subscriber ATM cell; a control processor generating control information in link access protocol (LAP) format; and an interface unit converting LAP control information into ATM cell to the intra-station device through the ATM switch, wherein the control information is communicated according to LAP, the intra-station device receives the control information and transmits a direct memory access request to obtain control data stored in the memory, the interface unit obtains and converts the data format of the control data into ATM cell to transmit to the intra-station device through the switch, and the intra-station device performs the communication operation on the subscriber ATM cell based on the control data received through the switch.

Intra-station control system for connectionless communications system

The quality and performance of the connectionless communications system are improved. When a BOM is received, the destination address DA of the L3-PDU stored in the payload of the BOM is retrieved, and the tag information is obtained from the DA (S,). The output message identifier MID is reserved (S,), and the tag information and output MID are assigned to the BOM (S,). Then, the tag information and output MID are written to the table. When a COM is received, the tag information and output MID are retrieved using the MID of the COM as a key, and the information is provided for the COM (S,and S,). When an EOM is received, the tag information and output MID are retrieved using the MID of the EOM as a key, and the information is provided for the EOM (S,and S,). Then, the output MID is released (S,).

Connectionless communications system, its test method, and intra-station control system

A supervision control system for an ATM cell switching system counts the number of cells transmitted from a subscriber in a predetermined duration unit, attaches a sign to the cells when the counted value exceeds a predetermined value, and discards the cells to which the sign is attached when a buffer does not have enough capacity during a cell multiplexation.

Supervision control system

An ATM exchange which is comprised of a multistage cascade connection of ATM switches of self-routing module structures which are provided with a plurality of outgoing lines and incoming lines, wherein it provides at the output side and the input side of the ATM switches output side conversion interfaces and input side conversion interfaces both for connection of adjoining ATM switches and uses optical cables to connect the output side interfaces and input side interfaces facing thereto. By this, it is possible to maintain the correct exchange operation even if the length of the transfer lines (outgoing lines and incoming lines) laid between ATM switches becomes greater along with extension of the ATM switches in the exchange.

Input and output side conversion interfaces for an ATM exchange

An ATM (asynchronous transfer mode) cell broadcasting system for use in ATM switches comprises switch matrices for exchanging ATM cells inputted from a plurality of input highways and outputting them to a plurality of output highways. The ATM cell broadcasting system further includes tag information adders, provided at respective input terminals of the switch matrices, for adding tag information according to respective identifiers assigned to the ATM cells. Alternatively, ATM-cell-switching identifier determinant memories may be provided for respective switch elements in the switch matrices, for storing determinant data enabling the switch elements to determine, from the identifiers of the ATM cells, which ones of the ATM cells are to switch and output to their respective output highways.

ATM cell broadcasting system

A television signal and ATM cell switching system for switching ATM cells of data other than television signals and for supplying one channel among a plurality of channels of television signals transmitted from a source to a subscriber to carry out one-way communication of the television signals from the source to the subscribers and two-way communication of the data other than the television signals between the network and the subscribers comprising, a television signal transmitting unit for transmitting television signals in the form of ATM cells, an ATM switching unit for switching ATM cell data other than the television signals, a television signal cell inserting circuit for receiving a plurality of channels of the television signals from the television signal transmitting unit, and for receiving ATM cell data other than the television signals after being switched by the ATM switching unit, the television signal inserting circuit comprising, a demultiplexing circuit for demultiplexing the output of the ATM switching unit to provide a plurality of outputs corresponding to respective subscribers, and a plurality of multiplexing circuits each for multiplexing the demultiplexed ATM cell received from one corresponding output of the demultiplexing circuit and one channel of the ATM cells selected in accordance with a request from the corresponding subscriber.

Television signal and ATM cell switching system

A cell having an attribute of a point-to-multipoint connection is distributed to each of a number of subscribers using a point-to-multipoint connection distributing switch to be provided in parallel with a point-to-point connection, concentrating and distributing switch. Therefore, a hardware configuration can be simply established. Besides, both a point-to-point connection, and a point-to-multipoint connection can be made only by switching a cell to each switching unit, and a software configuration can thus be simplified.

Point-to-multipoint connection system

An elastic store memory circuit includes first and second elastic store memories. Each of the first and second elastic store memories generates a phase comparison signal when a phase difference between a write timing and a read timing is within a predetermined phase range. The elastic store memory circuit also includes a selector which selects either the input data read out from the first elastic store memory or the input data read out from the second elastic store memory, and a slip signal generator for generating a slip signal on the basis of a write reset timing at which the first and second elastic store memories are reset, a read reset timing at which the first and second elastic store memories are reset, and the phase comparison signal. The slip signal indicates which one of the write reset timing and the read reset timing precedes the other one.

Elastic store memory circuit

A first form of an ATM channel testing apparatus tests an ATM channel by having a test cell detector in each switch to detect whether or not the switch appropriately switches a test cell generated by a test cell generating trunk. A second form of an ATM channel testing apparatus easily tests an ATM channel by having test cell generators provided for the respective input highways sequentially generating test cells including test cell identifying information and input highway identifying information, and having test cell checkers provided respectively for the output highways simply tally the test cells by the respective input highways. A third form of an ATM channel testing apparatus tests an ATM channel with less pieces of hardware by having turnaround parts in respective ordinary trunks sequentially turn around a test cell generated by a test cell generating trunk to be finally returned to the test cell generating trunk. A fourth form of an ATM channel testing apparatus tests an ATM channel by having a test cell checker provided for each of output highways to examine whether or not the test data carried in respective octets of the payloads in extracted test cells are of consecutive values.

Apparatus for testing ATM channels

An apparatus for detecting a fault in an ATM switch includes a stored cell number detection unit which detects a number of cells stored in the FIFO memory. A difference detection unit detects a difference between the number of cells stored in the FIFO memory and a predicted number of cells which must be stored in the FIFO memory. A difference evaluation unit determines whether or not the switch element has a fault on the basis of the difference detected by the the difference detection unit.

Apparatus and method for detecting fault in ATM switch

Switching system for ATM dual switch system

A main processor assigns originated-call processings to each of a plurality of call processors in the sequence of call originations according to the first principle of this invention. A switching state controller collects usage information about a plurality of buffers composing the switching network in the ATM exchanger. The call processors to which call processings are assigned perform the call processings based on the content of switching state controller a main processor assigns a call processing for an originated call to one of a plurality of call processors by referring to the call processing assignment table memory with the virtual channel identifier corresponding to an originated call according to the second principle of this invention thus, call processing loads are distributed among call processors.

Controller for distributing loads among call processors

Recognizers are provided in respective self-routing modules in respective stages of a channel operating according to a multi-stage self-routing method. A recognizer sets a stage number to the switches in the self-routing module of the stage it belongs to by recognizing a stage number setting signal supplied from a self-routing module in the preceding stage. Updaters are provided in respective self-routing modules. An updater updates a stage number setting signal supplied from a self-routing module in the preceding stage and outputs it to a self-routing module in the succeeding stage. A stage number setter is provided in a virtual channel controller connected before a channel. It outputs predetermined stage number setting signals to a self-routing module in the first stage of a channel. Stage numbers specified by the stage number setting signals are autonomously set when the stage number setting signals sequentially pass through self-routing modules in respective stages.

Switch stage number setting apparatus for MSSR channels

An ATM switching system includes two ATM switches which are the same as each other. Each of the ATM switches includes a switch buffer, and a cell counter which indicates the number of cells in the switch buffer. Each of the ATM switches also includes a difference calculator, which calculates the difference between the number of cells in the two switch buffers when one of the ATM switches is changed from an out-of-service state to a slave mode. At this time, the other ATM switch operates in a master mode. Each of the ATM switches further includes a dummy cell generator, which generates a number of dummy cells which corresponds to the difference calculated by the difference calculator. The generated dummy cells are written into the switch buffer in the slave mode. When it is determined that when all of the dummy cells have been output from the switch buffer, the two ATM switches are syunchronized with each other.

Apparatus and method for establishing identical data in dual ATM switches

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Kawasaki, Japan

Yasuhiro Aso