Mitsubishi Denki Kabushiki Kaisha

Yasuhiro Ami

Takeshi Fujii

A microcomputer includes an input terminal, coupled to the control terminal of a transmission gate, that receives a real-time request signal asserted by a peripheral. The transmission gate transfers data from a register to the peripheral in synchronism with the assertion of the real-time request signal so that data is provided to the peripheral in real time.

Microcomputer for outputting data to the outside of the microcomputer in

To change the priority order of a DMA transfer circuit and a CPU for the bus use right in a data processing system comprising the DMA transfer circuit, when an overflow occurs in the DMA transfer timer during DMA transfer, a request signal for shifting the bus use right from the DMA transfer circuit to the CPU is outputted to a bus use right decision circuit to suspend DMA transfer. After the bus use right is transferred from the DMA transfer circuit to the CPU, the CPU resumes operation. When an overflow occurs in the DMA transfer timer, a request signal for shifting the bus use right from the CPU to the DMA transfer circuit is outputted to the bus use right decision circuit to transfer the bus use right from the CPU to the DMA transfer circuit with the same means as the start of DMA transfer and to resume DMA transfer.

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Hyogo-ken, Japan

Yasuhiro Ami