Elpida Memory, Inc.

Nec Electronics Corporation

Other

Nec Corporation

Ps4 Luxco S.a.r.l.

Hitachi, Ltd.

Yasuhiko Ueda

Hiroyuki Fujimoto

Tatsuya Usami

Yuki Koga

Hidenobu Miyamoto

Fumiki Aiso

Hideaki Kawamoto

Kouichi Ohto

Yu Kosuge

A method of manufacturing a device includes: forming a fifth insulating film on a semiconductor substrate having a peripheral circuit region and a memory cell region in which a contact pad is formed; forming a second sacrifice film in the memory cell region in which the fifth insulating film is formed; forming, after the forming of the second sacrifice, a second insulating film in the peripheral circuit region on the semiconductor substrate to have a sidewall coming into contact with the second sacrifice film; forming a third insulating film to cover an upper surface of the second sacrifice film and an upper surface of the second insulating film; forming a hole penetrating through the third insulating film, the second sacrifice film and the fifth insulating film in the memory cell region; forming a lower electrode in the hole; and removing all of the second sacrifice film.

Method of manufacturing device

The present invention relates to a method of manufacturing a semiconductor device wherein etching is performed on films on a wafer using a plasma treatment apparatus. In the manufacturing method according to the present invention, a change in the difference between the emission intensities of a first wavelength component and a second wavelength component in plasma is monitored during etching. If the amount of change in the difference per unit time exceeds a predetermined threshold a given number of times in a row, then the flow rate of oxygen introduced to the plasma treatment apparatus is increased or, if the amount of change exceeding the predetermined threshold has not been seen, then the oxygen flow rate is set back to the original value thereof. This series of actions is repeated all the time during a set period of time.

Method and apparatus for manufacturing a semiconductor device

A semiconductor device may include, but is not limited to: a semiconductor structure extending upwardly; a first insulating film covering at least a side surface of the semiconductor structure; a gate electrode extending upwardly, the gate electrode being adjacent to the first insulating film; and an insulating structure extending upwardly, the insulating structure being adjacent to the gate electrode.

Semiconductor device with vertical transistor

An amorphous carbon film and an interlayer insulation film are formed in a memory cell region and a peripheral circuit region, respectively. An insulating film is formed on the amorphous carbon film and the interlayer insulation film. A portion of the insulating film that corresponds to capacitors on the amorphous carbon film is removed so that lower electrodes of the capacitors are supported from opposite sides of the lower electrodes. An insulating film pattern continuously extends from the memory cell region to the peripheral circuit region wholly covered with the insulating film pattern. Subsequently, the amorphous carbon film is removed to leave the capacitors supported by the insulating film pattern on both sides of the lower electrodes.

Semiconductor device and method of manufacturing the same

A semiconductor device includes an interlayer insulation film, a wiring embedded in the interlayer insulation film and an air gap part formed between a side surface of the wiring and the interlayer insulation film. A first sidewall film is formed in the air gap part so that the first sidewall film contacts with the side surface of the wiring.

Semiconductor device

In a method of manufacturing a semiconductor device, a trench is formed to have an upper quadrangular section and a lower circular section which is formed through a hydrogen annealing process, to extend in a depth direction of a semiconductor substrate. An insulating film is formed on a surface of the trench and a surface of the semiconductor substrate. A conductive film is formed to fill the trench whose surface is covered with the an insulating film. Source/drain regions are formed on both sides of the trench.

A semiconductor apparatus including a trench gate transistor having at least an active region surrounded by a device isolation insulating film; a trench provided by bringing both ends thereof into contact with the device isolation insulating film in the active region; a gate electrode formed in the trench via a gate insulating film; and a diffusion layer formed close to the trench; on a semiconductor substrate, and also includes an opening portion positioned on one surface of the semiconductor substrate; a pair of first inner walls positioned in a side of the device isolation insulating film and connected with the opening portion; a pair of second inner walls positioned in a side of the active region and connected with the opening portion; and a bottom portion positioned opposite to the opening portion and connected with the first inner walls and the second inner walls, wherein a cross sectional outline of the second inner wall is substantially linear, and a burr generated inside the trench is removed or reduced.

Semiconductor apparatus and method for fabricating the same

A semiconductor device includes a trench provided in a semiconductor substrate, a gate electrode formed in the trench through a gate dielectric film, and a diffusion layer formed in the vicinity of the trench. The trench includes an opening portion provided in a surface of the semiconductor substrate, a recess curved surface portion including a cross-sectional contour having a substantially circular arc shape, and a connection curved surface portion connecting the recess curved surface portion and the opening portion. The connection curved surface portion includes a continuous curved surface between the opening portion and the recess curved surface portion.

Semiconductor device including a trench with a curved surface portion and method of manufacturing the same

A method for manufacturing a semiconductor device includes the steps of forming a conductive hard mask coupled to the semiconductor substrate via discharge plugs on a thick insulating film, selectively etching the thick insulating film by using the conductive hard mask to form cylindrical holes in the thick insulating film. The resultant cylindrical holes are free form bowing structure.

Hard mask technique in forming a plug

Recently, with shortened wavelengths employed in aligners, it is now difficult to use a material containing a benzene ring as a photoresist material. Since resist has extremely low plasma resistance, formation of deep holes using a photoresist as a dry etching mask is difficult. Under such circumstances, in the present invention, amorphous carbon filmis formed on photoresistin which first holeis formed, and using amorphous carbon filmas a mask, deep second holeis formed in a etch target material such as underlying SiOfilm

Process for producing semiconductor integrated circuit device

A method for simply forming a miniature contact hole in a self-aligned manner with a wiring layer. A gate insulating film, a gate electrode, and a protective insulating layer are formed on the surface of a silicon substrate, and a blanket insulating film is deposited over the entire surface to cover a source/drain diffusion layer. Subsequently, an interlayer insulating film is laminated on the blanket insulating film. Nitrogen is added to a mixture gas of CFand O, and the resulting mixture gas is excited by a plasma for use as an etching gas. The interlayer insulating film is etched by reactive ion etching (RIE) using the blanket insulating film as an etching stopper to form a contact hole. A silicon nitride film is preferably used for the protective insulating layer. A silicon nitride film or a silicon carbide film is preferably used for the blanket insulating film.

Semiconductor device and method of fabricating the same

An etching mask having high etching selectivity for an inorganic interlayer film of SiO or Si N , an organic interlayer film such as ARC and an electrically conductive film and a contact hole using such an etching mask, a process for forming same and a resultant semiconductor device. On formation of contact holes for connecting wirings disposed through interlayer films of inorganic or organic material ( in FIG. ), a thin film of silicon carbide ( in FIG. ) having high etching selectivity for any of the inorganic and organic materials is deposited on an interlayer film, and a mask pattern of silicon carbide is formed using a resist pattern ( in FIG. ). Thereafter, high aspect ratio contact holes having a size which is exactly same as that of the mask is formed by etching the interlayer film using the silicon carbide mask.

Etching mask, process for forming contact holes using same, and semiconductor device made by the process

For selectively removing a silicon nitride film formed on a bottom of a contact hole or the like in a semiconductor device, plasma etching is performed using a process gas supplied therefor which is comprised of a first fluorine compound including a carbon atom-carbon atom bond &lsqb;for example, octafluorocyclobutane (C F ), hexafluorobutadiene (C F ), octafluorocyclopentene (C F )&rsqb;, and a second fluorine compound including at least one hydrogen atom and a single carbon atom in one molecule (for example, fluoromethane (CH F), difluoromethane (CH F ), trifluoromethane (CHF )&rsqb;. According to this method, the silicon nitride film on the bottom can be selectively removed without removing a silicon nitride film formed on a side wall of the contact hole and the like.

Method of removing silicon nitride film formed on a surface of a material with a process gas containing a higher-order fluorocarbon in combination with a lower-order fluorocarbon

There is provided a dry etching method for forming an insulating layer of SiO or the like in a desired shape with a substantially infinite selection property with respect to Si N used as an etching stopper. As an etching gas a gas (HI, or a gas having a constitution of C H I ) containing iodine in a molecule is added. Here, a mixing ratio (I/C) of iodine to carbon in the etching gas is 0.3&lE;(I/C)&lE;1.5. Alternatively, instead of the iodine-containing gas the gas containing chlorine or bromine as the same halogen element is used. Since iodine, chlorine, or bromine contained in the etching gas generates a low vapor pressure material on Si N , Si N etching is completely prohibited. Since no low vapor pressure material is generated on SiO or SiOF as a material to be etched, a high etching rate can be obtained.

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Tokyo, Japan

Yasuhiko Ueda