Kabushiki Kaisha Toshiba

Yasuhiko Taniguchi

Toshio Shimizu

Hiroshi Komorita

Yutaka Ishiwata

Kouji Araki

Hiroshi Fukuyoshi

Hiroyuki Hiramoto

Kosoku Nagata

Hironori Suzuki

Yoshiyasu Itoh

Masahiro Hanai

Hideyasu Andoh

Nobuyuki Shimizu

Takahiko Shindo

Yoshihiko Hirano

Masahiro Kan

Hiroyoshi Narita

Takeshi Udagawa

Masahiko Ebina

Keisuke Shimagami

Yoshihiro Ishizaki

An insulating substrate () has insulative ceramic layers () laid one upon another, an intermediate layer () made of a material that is different from a material of the ceramic layers and arranged between adjacent ones of the ceramic layers to join the adjacent ceramic layers to each other, a first conductive layer () joined to the top surface of a top one of the ceramic layers, and a second conductive layer () joined to the bottom surface of a bottom one of the ceramic layers. Even if any one of the ceramic layers has strength lower than design strength and causes a breakage due to, for example, thermal stress, the remaining ceramic layers are sound to secure a specified breakdown voltage for the insulating substrate.

Insulating substrate, manufacturing method thereof, and module semiconductor device with insulating substrate

An insulating substrate ( ) has insulative ceramic layers ( ) laid one upon another, an intermediate layer ( ) made of a material that is different from a material of the ceramic layers and arranged between adjacent ones of the ceramic layers to join the adjacent ceramic layers to each other, a first conductive layer ( ) joined to the top surface of a top one of the ceramic layers, and a second conductive layer ( ) joined to the bottom surface of a bottom one of the ceramic layers. Even if any one of the ceramic layers has strength lower than design strength and causes a breakage due to, for example, thermal stress, the remaining ceramic layers are sound to secure a specified breakdown voltage for the insulating substrate.

Insulating substrate including multilevel insulative ceramic layers joined with an intermediate layer

A voltage non-linear resistor unit is composed of at least one of voltage non-linear resistors which is composed of a columnar sintered body formed by molding and sintering a raw material, the sintered body having both end surfaces having a surface roughness in term of arithmetic average surface roughness Ra of 1 to 2 &mgr;m and being formed with an electrode film layer, a terminal metal fitting formed in a predetermined shape and attached to the voltage non-linear resistor, and a soldering material arranged between the voltage non-linear resistors and between joint surfaces of the voltage non-linear resistor and the terminal metal fitting, the joint surfaces being joined by heating the soldering material and applying a load vertically to the joint surfaces while giving a rotation motion thereto. Such voltage non-linear resistor is effectively assembled into an arrester.

Voltage non-linear resistor unit and arrester unit

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Tokyo, Japan

Yasuhiko Taniguchi