Kabushiki Kaisha Toshiba

Toshiba Electronic Devices & Storage Corporation

Yasuhiko Kuriyama

Toshiki Seshita

Masayuki Sugiura

Toru Sugiyama

Yoshikazu Tanabe

Kouhei Morizuka

Makoto Shibamiya

Akira Yoshioka

Mitsuru Sugawara

Masaaki Onomura

Hung Hung

Hitoshi Kobayashi

Tetsuya Ohno

Yasuhiro Isobe

Noriaki Yoshikawa

Yugo Kunishi

Hideki Sekiguchi

Yoshio Itagaki

A semiconductor device includes a first transistor, a first drive circuit including a second transistor, and a second drive circuit including a third transistor. The second transistor and the third transistor are connected in series; and a connection node of the second and third transistors is connected to a gate electrode of the first transistor. The first transistor, the second transistor, and the third transistor are normally-off MOS HEMTs formed in a first substrate that includes GaN. The first drive circuit charges a parasitic capacitance of the first transistor. The second drive circuit discharges the parasitic capacitance of the first transistor.

Semiconductor device

According to one embodiment, a first P-type transistor with a gate is coupled to a first node, and a drain is coupled to a second node. A first N-type transistor with a gate is coupled to the first node, and a drain is coupled to the second node. A second P-type transistor with a gate is coupled to the second node, and a drain is coupled to a third node. A second N-type transistor with a gate is coupled to the second node, and a drain is coupled to the third node. The first P-type transistor is smaller than the first N-type transistor. The second N-type transistor is smaller than the second P-type transistor. The second N-type transistor is smaller than the first N-type transistor.

Semiconductor device and semiconductor system including electro static discharge (ESD) protective device

According to one embodiment, a semiconductor circuit includes: an amplifier including an input terminal; an output circuit including a first node connected to the amplifier, and first and second output terminals, the output circuit performing a first output mode using one of the first and second output terminals or a second output mode using the first and second output terminals; and a bypass circuit between the input terminal and the first node. The output circuit includes a first switch between a second node and the first output terminal, a second switch between a third node and the second output terminal, a third switch between the second and third nodes, a first passive circuit connected to the second node, a second passive circuit connected to the third node, and a third passive circuit between the second and third nodes.

Semiconductor circuit

A high-frequency amplifier circuit has a source-grounded first transistor that amplifies a high-frequency input signal, a gate-grounded second transistor that further amplifies the amplified signal, a first inductor and a first reference voltage node, a second inductor connected between a first node and a second reference voltage node, a third transistor that is connected between the first node and a drain of the second transistor, is turned on at the time of selecting the first mode to transmit the amplified signal to the first node, and is turned off when selecting a second mode to disconnect the first node from the drain of the second transistor, a bypass path that bypasses the high-frequency input signal from an input node of the high-frequency input signal to the first node at the time of selecting the second mode, and a bypass switching circuit that is connected on the bypass path.

High-frequency amplifier circuit

A semiconductor device includes three transistors, five switches, two inductors, and a capacitor. A first transistor has a gate. The switches have one terminal connected in series with a drain of the first transistor in parallel. A second transistor has a source connected to the first switch and a grounded gate. A third transistor having a source connected to the second switch and a grounded gate. A first inductor and a second inductor each has one terminal connected in series with the third switch in parallel. A fourth switch has one terminal connected to the first inductor and another terminal connected to the source of the second transistor. A fifth switch has one terminal connected to the second inductor and another terminal connected to the source of the third transistor. A capacitor connected between the one terminal of the fourth switch and the one terminal of the fifth switch.

Circuitry includes an amplifier circuit having a first transistor, an inductor, and a second transistor, and a distortion compensation circuit having a third transistor, a forth transistor, and a first capacitor. The first transistor is applied input signal. The inductor is connected to a source of the first transistor and grounded on another side. The second transistor has a source connected to a drain of the first transistor, a grounded gate and a drain connected to a power supply, and outputs an amplified signal. The third transistor has a drain and a gate connected to the drain, and is connected to the power supply on the drain. The fourth transistor has a drain and a gate connected to a source of the third transistor, and is grounded on a source. The first capacitor connects nodes between the drain of the first transistor and the source of the third transistor.

High-frequency amplifier circuitry and semiconductor device

High-frequency amplifier circuitry has a common-source first transistor to amplify a high-frequency input signal, a common-gate second transistor to amplify a signal amplified by the first transistor to generate an output signal, a first inductor connected between a source of the first transistor and a first reference potential node, a second inductor connected between a drain of the second transistor and a second reference potential, a first switch to select whether to connect a first attenuator on an input signal path, a second switch to select whether to connect a first resistor between the input signal path and the first reference potential node, a third switch to select at least one of second resistors connected in parallel to the second inductor, and a fourth switch to select at least one of first capacitors connected in parallel on an output signal path connected to the drain of the second transistor.

High frequency amplifier circuitry includes a common-source first transistor to amplify a high-frequency input signal, a common-gate second transistor cascade-connected to the first transistor, to amplify a signal amplified by the first transistor to generate an output signal, a first inductor connected between a source of the first transistor and a first reference potential node, a second inductor connected between a drain of the second transistor and a second reference potential node, and non-linear compensation circuitry connected to a connection node of the first transistor and the second transistor, to compensate for non-linearity of the output signal to the high-frequency input signal. The non-linear compensation circuitry has first rectifier circuitry, a first resistor, a second resistor, second rectifier circuitry, first capacitor and second capacitor.

High-frequency amplifier circuitry includes first amplifier circuitry, second amplifier circuitry, and noise figure improving circuitry. The first amplifier circuitry includes a first transistor and a grounded-gate third transistor. The first transistor has a source grounded via a first source inductor and a gate to which an input signal is applied. The third transistor is configured to output from a drain a signal obtained by amplifying a signal outputted from a drain of the first transistor. The second amplifier circuitry includes a same circuit constant as a circuit constant of the first amplifier circuitry and includes a second transistor and a grounded-gate fourth transistor. The noise figure improving circuitry connects the source of the first transistor and the source of the second transistor to each other.

An amplifier amplifies an input signal. A splitter branches an output signal of the amplifier into a first signal path and a second signal path and performs impedance conversion of the first and second signal paths. A first output terminal outputs the output signal of the amplifier or a signal obtained by branching the output signal of the amplifier into the first signal path by the splitter. A second output terminal outputs the output signal of the amplifier or a signal obtained by branching the output signal of the amplifier into the second signal path by the splitter. An output controller switches whether the output signal of the amplifier is output from the first output terminal, is output from the second output terminal, or is branched by the splitter to be output from both the first and second output terminals.

A semiconductor device formed on a silicon on insulator substrate includes an input node to receive a first signal, such as a high frequency signal, and an output node to output a second signal corresponding to the first signal. A first transistor has a gate that receives the first signal from the input node and thereby outputs an amplified first signal. A second transistor is connected between a drain of the first transistor and the output node. An inductor is connected between a source of the first transistor and a ground potential. A capacitor connected is between the gate of the first transistor and the input node. An electrostatic discharge (ESD) protective element is connected between a first node and a second node. The first node is between the inductor and the first transistor, and the second node is between the input node and the capacitor.

Semiconductor device including an ESD protective element

According to an embodiment, a high-frequency semiconductor amplifier circuit includes an input terminal and an output terminal. A gate of a first transistor is connected to the input terminal. A drain of the first transistor is connected to the output terminal. A second transistor is connected between a source of the first transistor and a reference potential terminal. A bias generation circuit has an input control signal terminal, a bias voltage terminal connected to the gate of the first transistor, a control voltage terminal connected to a gate of the second transistor, and an intermediate voltage terminal connected to the drain of the first transistor. The bias generation circuit supplies a control voltage, a bias voltage, and a first voltage according to the input control signal.

High-frequency semiconductor amplifier circuit

A receiving circuit includes a plurality input nodes to receive an input signals and an output node to output a signal corresponding to the input signal. An amplifier in the circuit has an input terminal and an output terminal. A first switch selectively connects one of the input nodes to the input terminal of the amplifier. A second switch selectively connects the one of the input nodes to the output node. A controller supplies control signals to the first switch and the second switch. An impedance matching section is connected between the input nodes and the amplifier.

Receiving circuit, wireless communication module, and wireless communication device

A semiconductor switch includes a plurality of first terminals, a second terminal commonly provided for the plurality of first terminals, a plurality of first MIS switches provided between the plurality of the first terminals and the second terminal, respectively, configured to pass-through or cut-off a high frequency signal between the plurality of the first terminals and the second terminal, and formed on a SOI substrate, and a capacitor formed on the SOI substrate, connected between the second terminal and the plurality of the first MIS switches, and provided for the plurality of the first terminals commonly.

Growing community of inventors

Yokohama Kanagawa, Japan

Yasuhiko Kuriyama