Nec Corporation

Nippon Electric Co., Ltd.

Yasuharu Yoshida

Yoshimi Tagashira

Manabu Yagi

Toru Matsuura

Masato Tahara

Seijiro Yokoyama

Hiroshi Seguchi

A transmission capacity of a transmitter is controlled by a signal input from a receiver through a propagation path. The receiver produces a control signal for controlling a system at the optimum transmission capacity which is obtained from monitored information such as transmission quality or reception C/N and the like, and outputs the control signal to the transmitter and a judging circuit. The judging circuit compares the transmission capacity of each line. When the transmission capacity of a first regular line is the lowest transmission capacity, a switching signal is output from the judging circuit. Then a transmission switching device and a reception switching device operate and the input signal on the first regular line is output through the spare line. The transmission capacity of the signal is that of the spare line.

Digital transmission method and digital transmission system

An automobile communication system which can ensure fast hand-over without putting unnecessary burden on mobile stations and can adequately handle changes in road condition is disclosed. For each of the radio zones formed by roadside transceivers arranged along a road, a plurality of transmission and reception frequencies f/fand f/fare provided. The in-use transmission/reception frequencies in adjoining radio zones are switched at predetermined timing such that they are not permitted to be overlapped. By switching a time slot allocated to the vehicle-mounted transceiver, the vehicle-mounted transceiver can continuously communicate with the roadside transceivers at the same communication frequency over the radio zones.

Automobile communications method and system

A system for establishing radio communications between an in-vehicle unit and a road unit, including a signal controller in response to an output of an approaching vehicle detector, includes an on-board antenna forming part of the in-vehicle unit and provided to have directivity toward a road surface, a plurality of stationary devices, which form part of the road unit, provided in series between the signal controller and a terminator, and respectively coupled to the plurality of stationary antennas, and a plurality of stationary devices forming part of the road unit and provided in series between the signal controller and a terminator, and respectively coupled to the plurality of stationary antennas. Each of the plurality of stationary devices branches a signal transmitted thereto from the signal controller and applies the signal to the corresponding stationary antenna, and applies a signal transmitted thereto from the on-board antenna to the signal controller.

Electronic toll collection system and method featuring antenna arrangement

In a mobile object position detecting system for detecting a position of a mobile object having a transmitter, an elongated antenna system is provided for receiving a radio wave signal from the transmitter and outputting first and second electrical signals from first and second ends of the antenna system, respectively. A position detector calculates the position of the mobile object in accordance with a difference in time between the first and second electrical signals.

Simple mobile object position detecting system

In a demodulator for demodulating a multilevel quadrature amplitude modulated signal into inphase and quadrature demodulated signals (ID) and (QD), a processing unit (10) processes the multilevel quadrature amplitude modulated signal to produce inphase and quadrature processed signals (IDS) and (QDS). An inphase phase controller (20) is supplied with an inphase control signal and the inphase and the quadrature processed signals and produces an inphase phase controlled signal as the inphase demodulated signal. The inphase demodulated signal comprises an inphase data signal and an inphase error signal. A quadrature phase controller (21) is supplied with a quadrature control signal and the inphase and the quadrature processed signals and produces a quadrature phase controlled signal as the quadrature demodulated signal. The quadrature demodulated signal comprises a quadrature data signal and a quadrature error signal. An inphase multiplier (22) multiplies the inphase error signal by the quadrature data signal and produces an inphase multiplied signal as the inphase control signal. A quadrature multiplier (23) multiplies the quadrature error signal by the inphase data signal and produces a quadrature multiplied signal as the quadrature control signal.

Multilevel quadrature amplitude demodulator capable of compensating for

In a digital demodulator, a recovered baseband signal is sampled in response to a clock pulse supplied from a VCO and converted to a digital signal representing one of multilevels of the sampled signal. Real-axis and imaginary-axis transversal equalizers are provided. Each equalizer has a tapped delay line for receiving the digital signal, a plurality to tap weight multipliers connected respectively to taps of the tapped delay line, and an adder. The adder of the real-axis transversal equalizer sums all outputs of the tap weight multipliers except for the output of one which is connected to a tap adjacent to the center tap for producing a partially equalized signal, while the adder of the other equalizer sums all outputs of the tap weight multipliers for producing a fully equalized signal. Both of the equalized signals are summed by an adder and applied to a phase control circuit which derives from it a VCO control signal so that it corresponds to a tap-weight control signal applied to the multiplier whose output is excluded from being summed by the adder of the real-axis transversal equalizer. The output of the adder is summed with the excluded multiplier output and supplied to a tap weight controller which controls the multipliers of both transversal equalizers.

Demodulator with composite transversal equalizer and eye detection clock

A modulating device applicable to a digital radio communications system which is adaptable to a 16 or greater multi-level QAM modulation system. The device has two multi-input digital filters to implement the role of cosine roll-off filters. A logic circuit precedes the digital filters to logically manipulate n-bit data streams except for m bits (m&lt;n) thereof which should be modulated, in a predetermined manner. The logic circuit is capable of correcting deviations of signal points of a QAM wave or changing the contour of signal constellation to a circular contour or the like, as desired.

Quadrature amplitude modulation system using digital filters

An automatic level control circuit for a multi-level quadrature amplitude-modulated (QAM) demodulator having a QAM detector, which produces baseband in-phase (P) and quadrature (Q) signals in response to an input QAM camer wave, and two analog-digital (A/D) convertors which convert the Q and P signals into two parallel digital signals. Automatic level control of the input level of the baseband signal to the A/D convertor is maintained constant by the combination of a reference signal generator in a feed back loop with each A/D convertor. The A/D convertor produces a decoded digital signal and the reference voltage generator, in response to those signals, provides reference voltage to the A/D convertor that are optimized in response to variations in input signal level.

Automatic level control circuit for an ad convertor

A 2.sup.n -level demodulated signal is resolved into 2.sup.(n+m) equal intervals by an (n+m)-bit A/D converter (12) and an (n+m)th significant bit is produced from the LSB output of the converter as a representation of an interfering signal contained in the demodulated signal, where m is equal to or greater than unity. A subtractor (5p, 5q; 32p, 32q) cancels the interfering signal with a cancelling signal supplied from a feedback control circuit (9, 11, 7; 16-19; 30-31) which derives it by controlling the amplitude of the (n+m)th significant bit in accordance with the amount of the interfering signal still present in the output of the subtractor.

Interference immune digital modulation receiver

In a digital transmission system, a clock regeneration circuit includes a phase-locked loop having a low-pass filter, a voltage-controlled oscillator connected thereto, and a phase comparator for supplying to the low-pass filter a signal representative of the phase difference between an incoming two-level data bit stream and the output of the voltage-controlled oscillator. The incoming data bit stream is converted into a plurality of parallel data bit streams and fed to a multi-level quadrature amplitude modulator in response to a clock signal derived from the output of the voltage-controlled oscillator and converted into an outgoing multi-level digital signal. An incoming CMI (coded mark inversion) coded binary signal is sampled by a flip-flop for in response to the output of the voltage-controlled oscillator to supply an output signal to the VCO through the low-pass filter.

Phase-locked clock regeneration circuit for digital transmission systems

A clock synchronizing circuit separates and filters a clock component from a digital input wave. The output of the circuit is sampled to produce a two-level signal. A voltage controlled oscillator generates a clock signal having a phase and a frequency which is controlled responsive to the two-level signal.

Clock synchronizing circuit including a voltage controlled oscillator

In a demodulation system comprising a demodulator (22) which demodulates a quadrature amplitude modulated signal into first and second sets of output digital signals by the use of a reference carrier signal (CA), a specific phase control signal is produced in a transient state by discriminating a plurality of areas and a plurality of zones defined on a phase plane of the modulated signal. The areas are defined by dividing the phase plane by both a pair of quadrant reference axes and a pair of auxiliary reference axes phase shifted by .pi./4 (radians) relative to the quadrant decision axes. The zones are defined along and adjacent to the auxiliary reference axes. First and second detection signals (S.sub.1 and S.sub.2) are produced by a read-only memory (35) as results of discrimination of the areas and the zones, respectively. The specific phase control signal is switched to a normal phase control signal produced in a normal state in the known manner. Alternatively, the first and the second detection signals may be supplied to a transversal equalizer (21) for controlling imaginary part weighting control signals.

Demodulation system capable of establishing synchronization in a

In a demodulator for use in demodulating a quadrature amplitude modulated signal into a first and a second digital signal by the use of a reproduction of a carrier wave, a pull-in phase is detected by a pull-in phase discriminator (55) after establishment of synchronization. The reproduction of the carrier wave is momentarily phase shifted in a phase modulator (65, 65') with reference to the pull-in phase and is produced as a phase shifted carrier signal. The resultant pull-in phase is momentarily corrected to avoid abnormal demodulation. Detection of the pull-in phase is possible either by monitoring a demodulating analog signal and the first and the second digital signals or by monitoring only the first and the second digital signals. The phase modulator may be either a two-phase modulator or a n.pi./2-phase one where n is a natural number between unity and three, both inclusive.

Demodulator capable of avoiding abnormal demodulation

Responsive to a first and a second main data signal and a subdata signal, a multilevel modulator produces a composite modulated signal which comprises a quadrature amplitude modulated component modulated by the first and the second main data signals and represented by a radius on a phase plane and a phase modulated component modulated by the subdata signal are represented by a clockwise and a counterclockwise shift on the phase plane. A multilevel demodulator carries out an inverse operation to reproduce the composite modulated signal into first and second reproduced main data signal and a reproduced subdata signal.

Multilevel modulator capable of producing a composite modulated signal

In a digital-to-analog converter, a digital input signal of x bits is subjected to digital-to-analog conversion with at least two of x bit positions recognized as a common bit position and converted into analog levels of a number which is different from 2.sup.x where x is an integer. At least one additional common bit position may be selected from the x bit positions except the common bit position. The digital input signal may be pre-processed by the use of a logic circuit prior to the digital-to-analog conversion so as to control the number of analog levels. The digital-to-analog converter is applicable to a modulator which produces a quadrature amplitude modulated signal having a circular arrangement of signal points on a phase plane. A demodulator comprises an analog-to-digital converter for converting the above-mentioned analog signal into a reproduction of the digital input signal.

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Tokyo, Japan

Yasuharu Yoshida