Oki Electric Industry Co., Ltd.

Oki Semiconductor Co., Ltd.

Yasufumi Uchida

Shigeru Yamada

Yoshinori Shizuno

Noriko Murakami

Yoshihiro Saeki

Yoshimi Egawa

A second semiconductor chip and a junction member are mounted on a first semiconductor chip formed with a plurality of first pads on a surface thereof. A resin encapsulating body is provided which seals the first semiconductor chip, the second semiconductor chip and the junction member. The second semiconductor chip includes a plurality of second pads arranged in a central part thereof. The junction member includes first junction pads, second junction pads and connecting portions which connect the first junction pads and the second junction pads respectively. Electrical connections of the second semiconductor chip from the second pads include connections to connecting terminals and connections to the connecting terminals or the first semiconductor chip from the second junction pads via the first junction pads.

Junction member comprising junction pads arranged in matrix and multichip package using same

There are provided a semiconductor device construction having more degrees of design freedom of the semiconductor element than prior arts, and a method of manufacturing such device easily and at low cost. For this purpose, a rearrangement sheet is employed provided with an insulating sheet and conductive metallic patterns formed on this insulating sheet.

Rearrangement sheet, semiconductor device and method of manufacturing thereof

In a semiconductor device having a semiconductor chip mounted on a printed circuit board, the semiconductor chip has a plurality of electrodes and the printed circuit board has a plurality of conductive patterns. Metallic plated layers are formed on the electrodes of the semiconductor chip. The metallic plated layers on the electrodes of the semiconductor chip are electrically connected with the conductive patterns of the printed circuit board by metallic wires.

Semiconductor device and manufacturing method thereof

A semiconductor device including a package body, a substrate contained within the package body and having a first side and an opposite second side, a first chip mounted on the first side of the substrate and within the package body, a second chip mounted on the second side of the substrate and within the package body and a plurality of leads each including an inner lead portion contained within the package body and an outer lead portion located outside the package body wherein each inner lead portion includes first and second bends to define a step configuration and wherein a distal end of each inner lead portion is mounted to the second side of the substrate.

Multi-chip package semiconductor device having plural level interconnections

A semiconductor device includes a first semiconductor element provided with bonding electrodes at a predetermined pitch and lead frames provided on the first semiconductor element which work as electrical inputs/outputs. The semiconductor device further includes a substrate provided on the lead frames that is provided with metal wirings having a predetermined pitch, and a second semiconductor element provided on the substrate and provided with bonding electrodes having substantially the same pitch as the metal wirings. The semiconductor device further includes solder balls for respectively electrically connecting the bonding electrodes provided on the second semiconductor element and the metal wirings formed on the substrate, first metal wires for respectively electrically connecting the bonding electrodes provided on the first semiconductor element and the lead frames, and second metal wires for respectively electrically connecting the metal wirings provided on the substrate and the lead frames.

Semiconductor device having multi-chip package

A semiconductor device includes a substrate ( ); a first semiconductor chip ( ) mounted on the substrate; and a first insulating layer ( ) which is provided on the first semiconductor chip. The device further includes a metal layer ( ) which is provided on the first insulating layer; a second insulating layer ( ) which is provided on the metal layer; and a second semiconductor chip ( ) which is provided on the second insulating layer.

Method for fabricating multi-chip package semiconductor device

In a method of fabricating a semiconductor device, a semiconductor wafer is provided with a plurality of semiconductor elements formed thereon. An insulating adhesive is selectively provided over respective predetermined areas of the semiconductor elements. The semiconductor wafer is then separated into the semiconductor elements, each having corresponding portions of the insulating adhesive thereon.

Method for selectively providing adhesive on a semiconductor device

A semiconductor device includes a substrate; a metal layer formed on the substrate; an insulating layer, which is formed on the metal layer and is provided with a via-hole through it; and a bonding pad formed above the via-hole. The bonding pad comprises an inner portion arranged in the via-hole and an outer portion arranged above the via-hole. The boding pad is made of a conductive resin having a shock absorbing characteristic.

Semiconductor device with shock absorbing bond pad

Semiconductor device and method for fabricating the same

According to a typical invention of the inventions disclosed in the present application, a semiconductor chip with an electronic circuit formed therein is fixed to a die pad for a lead frame having projections formed on the back thereof, with an organic dies bonding agent. Pads on the semiconductor chip, and inner leads are respectively electrically connected to one another by metal thin lines. These portions are sealed with a molding resin. Further, each inner lead extends to the outside of the molding resin and is processed into gull-wing form for substrate mounting. Moreover, the inner lead is processed by soldering so that an external terminal is formed. Thus, since the projections are provided on the back of the die pad, the back of a packing material is brought into point contact with that of the die pad as compared with the conventional face-to-face contact. It is therefore possible to minimize the transfer of organic substances from the packing material. Further, since such transfer that a reduction in adhesive property occurs in the back of the die pad, is greatly reduced, the adhesiveness between the upper surface of the die pad and the molding resin is improved, whereby the resistance of SMD to the reflow is enhanced.

Semiconductor device having an improved structure for preventing cracks, improved small sized semiconductor and method of manufacturing the same

Semiconductor device having an improved structure for preventing cracks, and improved small-sized semiconductor

Semiconductor device having first and second chips

A semiconductor device includes a semiconductor element having a plurality of electrodes on an upper surface thereof. A first substrate has a plurality of conductors on an upper surface thereof. The first substrate is mounted on the upper surface of the semiconductor element and is smaller in area than the semiconductor element. A second substrate has a plurality of solderballs on an upper surface thereof. The second substrate is mounted on the upper surface of the first substrate and is smaller in area than the first substrate. An adhesive layer is disposed between the first substrate and the semiconductor element, and causes the first substrate to be affixed to the semiconductor element. A plurality of metal wires electrically couple the electrodes on the semiconductor element to the conductors on the first substrate. A sealing frame is attached to the semiconductor element. A cap is bonded to both the second substrate and the sealing frame. An interior region is defined by the semiconductor element, the first and second substrates, the cap and the sealing frame. The wires are disposed in the interior region.

Semiconductor device having an improved structure for preventing cracks, improved small-sized semiconductor and method of manufacturing the same

A semiconductor device including electrode pads on a semiconductor element, leads coupled with some of the electrode pads via bonding wires, and common lines provided on the semiconductor element that achieve electrical continuity for other electrode pads that handle a common signal. At least the surfaces of the common lines are covered with an insulating member such as an insulating adhesive tape. With this, the loops of the bonding wires can be lowered, thereby achieving a thinner package.

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Tokyo, Japan

Yasufumi Uchida