Motorola Corporation

Yaron Gold

Ezra Baruch

Dan M Bruck

William C Moyer

Sanjay Wanchoo

An interface (,) in a computer system has an port (,) which is coupled to a memory via a first bi-directional data path (,) and coupled to a peripheral device via a communication path (,). The interface (,) has a controller (,) with an enable portion (,) and a pointer register (,). The pointer register (,) provides a movable pointer (,) to memory entries of data queues. The enable portion (,) continuously receives control signals from the memory (,) and sends enable signals to a port (,). A queue of memory entries is transmitted through the first path (,), the port (,) and the second path (,) or vice versa as long as control signals stored in the queue itself allow a transmission.

Computer system with interface and method

A computer system (100) comprises a processor (110), a memory (300), an interface (101) and peripheral devices (120-1, 120-2, 120-3). The interface has a pointer generator (160), a port (150), a decoder (170), and a parameter register (180). The port (150) transmits data words D(k) (380-k) from the memory (300) to the peripheral devices (120-1, 120-2, 120-3) or vice versa. Communication parameters are stored as parameter sets {P.sub.m } in parameter fields (185-m) of the parameter register (180). The decoder (170) selects a parameter set {P.sub.i } using from control words C(k) stored in the memory (300). Data queues can simultaneously be transmitted to two or more peripheral devices (120-1, 120-2, 120-3).

Interface with selector receiving control words comprising device

An interface (101) in a computer system has an port (150) which is coupled to a memory via a first bidirectional data path (104) and coupled to a peripheral device via a communication path (106). The interface (101) has a controller (170) with a trigger buffer (175) and a pointer register (160). The pointer register (160) provides a movable pointer (165) to memory entries of data queues. The trigger buffer (175) continuously receives and accumulates trigger signals (1 2 3) and sends start signals to the pointer register (165). A queue is transmitted through the first path (104), the port (150) and the second path (106) or vice versa when a first trigger (e.g., (1) signal arrives. The trigger buffer (175) receives further trigger signals (e.g., (2) and accumulates them in a trigger buffer (175) before it sends start signals (e.g., ) for further transmissions. Optionally, interface 101 provides start signals after prioritizing trigger signals.

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Kadima, Israel

Yaron Gold