Intel Corporation

Yaozu Dong

Kun Tian

Yun Yu Wang

Zhiyuan Lv

Yunhong Jiang

Chuanxiao Dong

Zhi Jun Wang

Arun Dattaram Sharma

Zhi Wang

Ke Yu

Rohit Seth

Xiaoyan Feng

Yunyoung Wang

Implementations disclosed describe a system and a method to execute a virtual machine on a processing device, receive a request to access a memory page identified by a guest virtual memory address (GVA) in an address space of the virtual machine, translate the GVA to a guest physical memory address (GPA) using a guest page table (GPT) comprising a GPT entry mapping the GVA to the GPA, translate the GPA to a host physical address (HPA) of the memory page, store, in a translation lookaside buffer (TLB), a TLB entry mapping the GVA to the HPA, modify the GPT entry to designate the memory page as accessed, detect an attempt by an application to modify the GPT entry; generate, in response to the attempt to modify the GPT entry, a page fault; and flush, in response to the page fault, the TLB entry.

Dynamical switching between EPT and shadow page tables for runtime processor verification

Methods, software, and apparatus for application transparent, high available GPU computing with VM checkpointing. The guest access of certain GPU resources, such as MMIO resources, are trapped to keep a copy of guest context per semantics, and/or emulate the guest access of the resources prior to submission to the GPU, while other commands relating to certain graphics memory address regions are trapped before being passed through to the GPU. The trapped commands are scanned before submission to predict: a) potential to-be-dirtied graphics memory pages, and b) the execution time of intercepted commands, so the next checkpointing can be aligned to a predicted execution time. The GPU internal states are drained by flushing internal context/tlb/cache, at the completion of submitted commands, and then a snapshot of the vGPU state is taken, based on tracked GPU state, GPU context (through GPU-specific commands), detected dirty graphics memory pages and predicted to-be dirtied graphics memory pages.

Support for application transparent, high available GPU computing with VM checkpointing

An apparatus, system, method, and machine-readable medium are disclosed. In one embodiment the apparatus is a network interface controller that includes one virtual function owned by a virtual machine present in the computer system. The controller includes a simple filtering agent that is associated with the first virtual function. The agent enforces simple filter rules for received network packets. The simple filter rules are capable of blocking the network packets from reaching the virtual machine. The apparatus also includes another virtual function that is owned by a virtual machine monitor present in the computer system. The controller also includes a side bounce filtering agent to forward the first network packet to the second virtual function if the first packet is blocked by the at least one of the one or more simple filter rules.

Cooperated approach to network packet filtering

Systems and methods may provide for identifying an assigned address space of a virtual machine (VM), wherein the assigned address space is associated with a graphics memory. Additionally, the assigned address space may be ballooned to disable usage by the VM of a remaining address space in the graphics memory that is not assigned to the VM. In one example, a view of the assigned address space by the VM may be identical to a view of the assigned address space by a virtual machine monitor (VMM) associated with the VM.

Efficient graphics virtualization with address ballooning

A method, including monitoring, by a remapping manager, a system state of a computing device for the occurrence of a predefined event, detecting, by the remapping manager, the occurrence of the predefined event, and initiating, by the remapping manager upon the detection of the predefined event, a remapping of first encoded addresses stored in tags, the first encoded addresses are associated with locations in main memory that are cached in a memory cache.

Efficient dynamic randomizing address remapping for PCM caching to improve endurance and anti-attack

A virtualization based system comprises a host and a plurality of virtual machines that may each comprises a guest memory. A virtual machine monitor has access to underlying platform hardware in the system and may control physical resources in the platform. The platform hardware comprises a processor and a memory coupled to the processor. Further, the VMM may manage guest software including guest operating systems running on the virtual machines. A binary translation logic may replace guest memory writing instructions corresponding to a hot spot in guest application with translated codes to generate a mirrored content for the guest memory. The binary translation logic may combine one or more of the guest memory writing instructions in a region and keep the region atomic. The processor may execute the translated codes in an atomic region together to write a content in the guest memory and a mirrored content in a mirroring memory. The VMM may allocate a memory region in the host memory for the mirroring memory. The guest memory comprises one or more guest memory pages and the mirroring memory may comprise one or more mirroring memory pages. The VMM may add an offset to a virtual address of a guest memory page to obtain a virtual address of a mirroring memory page. The VMM may manage or emulate a guest page table comprising a mapping between virtual address to guest physical addresses for the guest memory. The VMM may synchronize a shadow page table with the mapping in the guest page table. The shadow page table comprises a mapping of virtual addresses to host physical addresses for the guest memory and a mapping of virtual addresses to host physical addresses for the mirroring page. Upon a memory failure in the guest memory page, the VMM may restore the content of the corrupted guest memory page from the mirroring memory page.

System method for memory virtualization control logic for translating virtual memory in space of guest memory based on translated codes in response to memory failure

Machine-readable media, methods, apparatus and system are described. In some embodiments, a virtual machine monitor of a computer platform may comprise a service virtual machine created by the virtual machine monitor partitioning an underlying hardware machine to support execution of a plurality of overlying guest operating systems, wherein the plurality of guest operating systems comprise a guest operating system complying with a non-native guest system architecture different from a host system architecture with which the hardware machine complies. The service virtual machine may further comprise a translation layer to translate instructions from the guest operating system complying with the non-native guest system architecture into instructions complying with the host system architecture.

Supporting heterogeneous virtualization

Generally, this disclosure describes systems (and methods) for moderating interrupts in a virtualization environment. An overflow interrupt interval is defined. The overflow interrupt interval is used for triggering activation of an inactive guest so that the guest may respond to a critical event. The guest, including a network application, may be active for a first time interval and inactive for a second time interval. A latency interrupt interval may be defined. The latency interrupt interval is configured for interrupt moderation when the network application associated with a packet flow is active, i.e., when the guest including the network application is active on a processor. Of course, many alternatives, variations, and modifications are possible without departing from this embodiment.

Cooperated interrupt moderation for a virtualization environment

A processing system executes an emulation patch for a guest virtual machine (VM) of the processing system. In one embodiment, the emulation patch includes data to facilitate identification of a routine to emulate a guest instruction. After executing the emulation patch for the guest VM, the processing system may use the data to find an emulation routine for emulating the guest instruction. The processing system may transfer control from the guest VM to a virtual machine monitor (VMM) in response to execution of the emulation patch, without saving a trap frame. The VMM may then find and execute the emulation routine for the guest instruction without decoding the guest instruction. A break instruction with an immediate value, for example, may be used for the emulation patch. The immediate value may be used for finding the emulation routine. Other embodiments are described and claimed.

Method and apparatus to support virtualization with code patches

A computing platform (source) supporting virtualization comprises a plurality of virtual machines each including a virtual function driver and a guest operating system, and a hardware block including a plurality of virtual functions and visible states and invisible states. The virtual function driver or a guest OS or a virtual machine monitor further includes a self-emulation layer to create a shadow state, which emulates the invisible states of the virtual function, which is to be migrated. The virtual function driver uses contents of the shadow state to migrate one or more of the plurality of virtual functions to a target virtual machine. The source and the target virtual machines are included in a cloud data center and the virtual functions, migrated to the target virtual machine is highly available to provide services.

Efficent migration of virtual functions to enable high availability and resource rebalance

Heterogeneous virtualization of host and guest OS having different register sizes using translation layer to extract device port numbers for host OS system memory addresses

Growing community of inventors

Shanghai, China

Yaozu Dong