Silicon Storage Technology, Inc.

Semiconductor Manufacturing International (Shanghai) Corporation

Semiconductor Manufacturing International (Beijing) Corporation

International Business Machines Corporation

Te Connectivity Corporation

Tyco Electronics (Shanghai) Co., Ltd.

Shanghai Natlinear Electronics Co., Ltd.

Semiconductor Manufacturing International Corp.

Yao Zhou

Xiaozhou Qian

Hao Ni

Kai Man Yue

Bin Sheng

Tian Shen Tang

Tao Wang

Salvador Hernandez-Oliver

Guangming Lin

Ning Bai

Yaohua Zhu

Ke Zhao Li

Li Hui Guo

Dan Dan Wang

Yongjie Gong

Xiao Yan Pi

Long Wen Lan

Yi Gao

Ning Ding

Wen Wu Na

Jiaxu Peng

Guizhi Liu

Qixin Xue

Fei Lin

Jia Xu Peng

Lu Guo

Shouquan Zhao

Xiaoqiang Jiang

Tianshen Tang

Kaiman Yue

A system may include a cluster and a module of the cluster. The module may include a user resource definition and a catalog server. The catalog server may maintain a configuration of the cluster.

Open-source container cluster hot plug adapter

An active rectifier bridge circuit and an on-chip integrated system. The active rectifier bridge circuit includes: a bias module, configured to provide a first bias current source, a second bias current source, and an internal power supply for a gate driver module; the gate driver module controlled by the first bias current source, the second bias current source, and the internal power supply, and configured to process one group of alternating current input voltages to generate two groups of control signals that are mutually inverted, to generate four gate drive signals; a power switch tube rectification module, connected to the bias module and the gate driver module, configured to: perform a turn-on or turn-off operation on corresponding power switch tubes under the control of the four gate drive signals, and convert the one group of alternating current input voltages into a direct current output voltage for output.

Active rectifier bridge circuit and on-chip integrated system

Provided is a method, system, and computer program product for managing requests received by a storage system. The method may include detecting, by one or more processors, a failure in a first storage system in response to a request to access data in the first storage system. The first storage system may include a primary storage for storing the data. A second storage system may be activated in response to the detected failure. The second storage system may include a first storage and a second storage. The first storage may include data synchronized with the primary storage of the first storage system. The second storage may be used to store data that corresponds to the request. The request may be managed using the second storage system.

Storage system management

The present disclosure provides a magnet device for providing the magnetic density changes/magnetic field changes in relation to a detecting position. The magnet device comprises a magnet member adapted to be mounted on a rotatable shaft and be rotated for producing the magnetic density changes/magnetic field changes in relation to the detecting position when the magnet member is rotating around the rotatable shaft. To concentrate/condense the density of the magnetic density changes/magnetic field changes, the magnet device includes a magnetic flux density concentrator.

Magnet device and position sensing system

Provided is a magnet device for use with a position sensor. The magnet device has a magnetizing direction and has magnetic field intensity components in the magnetizing direction. The magnet device is formed with a groove recessed in the magnetizing direction, so that the magnetic field intensity components are substantially equal in the transverse direction of the magnetizing direction. The present invention further discloses a magnet assembly including the magnet device for use with a position sensor and a sensing system including the magnet assembly, particularly a neutral position sensor. The axial measuring length of a transmission shaft is prolonged with the length of the magnet device remains unchanged to meet the requirements of different customers, and the reliability of the sensing system is improved.

Magnet device for position sensor, magnet assembly and sensing system including the magnet assembly

Memory arrays and reading, programming and erasing methods of the memory arrays are provided. An exemplary memory array includes a plurality of memory columns. Each memory column has a plurality of flash memory cells. The memory columns are divided into at least two blocks. At least one source pull down column is disposed between the two adjacent blocks. Each source pull down column has a plurality of flash memory cells. A source of each flash memory cell in the source pull down column is coupled to sources of the flash memory cells of the plurality memory columns in a same row as the flash memory cell in the source pull down column to pull down a source of a selected flash memory cell to 0 V.

Memory array, and method for reading, programming and erasing memory array

The present invention relates to an improved sense amplifier for reading values in flash memory cells in an array. In one embodiment, a sense amplifier comprises an improved pre-charge circuit for pre-charging a bit line during a pre-charge period to increase the speed of read operations. In another embodiment, a sense amplifier comprises simplified address decoding circuitry to increase the speed of read operations.

Sense amplifier with bit line pre-charge circuit for reading flash memory cells in an array

A nonvolatile memory includes a first array bank coupled to a first bit-line, a second array bank coupled to a second bit-line, a pre-charging circuit, a first selection circuit, a second selection circuit, and a sense amplifier. An address enable signal sent to the first selection circuit controls whether the pre-charging circuit needs to pre-charge the first bit-line and the second bit-line. The sense amplifier is configured to compare a first voltage from the first output terminal of the pre-charging circuit with a second voltage from the second output terminal of the pre-charging circuit to obtain a result indicating data information stored in the first array bank or in the second array bank. The second selection circuit is configured to connect a reference current to the first input terminal or the second input terminal of the sense amplifier based on a first word-line signal and a second word-line signal.

Nonvolatile memories and reading methods thereof

A charge pump voltage regulator is provided. The charge pump voltage regulator includes a charge pump circuit, where an output terminal of the charge pump circuit outputs a stable voltage. The charge pump voltage regulator also includes a voltage divider circuit suitable to divide the stable voltage to output a divided voltage and a clock oscillator providing a drive clock signal for the charge pump circuit. In addition, the charge pump voltage regulator includes a first voltage comparator circuit suitable to output at least one of a first comparison result and a second comparison result. Further, the charge pump voltage regulator includes a logic control unit, where, when the charge pump voltage regulator operates in a standby mode, the logic control unit outputs a first control level to the clock oscillator according to the at least one of the first comparison result and the second comparison result.

Charge pump voltage regulator

A memory and a reference circuit calibration method are provided. The memory includes: a memory array including a plurality of memory cells; a reference circuit including a reference memory cell and a reference connection terminal, wherein the reference memory cell is a same as the memory cell; a calibration circuit including a calibration connection terminal, and a mirror circuit including a first mirror terminal and a second mirror terminal, wherein the first mirror terminal is connected to the reference connection terminal, and the second mirror terminal is connected to the calibration connection terminal; a clamp circuit, configured to set one of a voltage of the reference connection terminal and a voltage of the calibration connection terminal as a preset voltage and to set the other thereof as a comparison voltage; and a comparison circuit configured to input the comparison voltage and the preset voltage, and to output a comparison result.

Memory and reference circuit calibration method thereof

An improved sensing circuit is disclosed that utilizes a bit line in an unused memory array to provide reference values to compare against selected cells in another memory array. A circuit that can perform a self-test for identifying bit lines with leakage currents about an acceptable threshold also is disclosed.

High speed and low power sense amplifier

A self-timer for a sense amplifier in a memory device is disclosed.

Self-timer for sense amplifier in memory device

The invention comprises a non-volatile memory device with a sensing amplifier that includes a current mirror comprising a pair of resistors.

Low voltage current reference generator for a sensing amplifier

A trimmable current reference generator for use in a sense amplifier is disclosed.

Trimmable reference generator for sense amplifier

A trimmable sense amplifier for use in a memory device is disclosed.

Growing community of inventors

Shanghai, China

Yao Zhou