Taiwan Semiconductor Manufacturing Comp. Ltd.

Yao-Tung Liu

Yung-Min Cheng

Ming-Hsiu Hsieh

Wen-Feng Wu

Yi-Chin Hsu

Shun-An Chen

Chun-Sheng Wang

Fu-Kang Lai

Ming-Hui Lin

Lieh-Chang Tai

Min-Huey Tsai

Juei-Feng Hsu

Yi-Hsin Chan

Hsin-Hom Chen

Li-Chung Lin

Chun-Tsung Yang

Within a method for electrical testing a series of microelectronic fabrication die fabricated within a microelectronic fabrication substrate, there is first electrically tested the series of microelectronic fabrication die to determine at least one sub-series of electrically unacceptable microelectronic fabrication die. Similarly, there is also determined whether the microelectronic fabrication substrate may be reworked. Finally, there is also electrically retested only the at least one sub-series of electrically unacceptable microelectronic fabrication die, and only if the microelectronic substrate may be reworked. The method provides for enhanced efficiency when electrically testing the series of microelectronic fabrication die.

Microelectronic fabrication die electrical test method providing enhanced microelectronic fabrication die electrical test efficiency

A system for monitoring semiconductor testing tools comprises a tester testing a semiconductor device, whereby a test result is derived, a storage device storing a logic function corresponding to the semiconductor device, and a processor receiving the test result and the logic function from the tester and storage device respectively, and applying the logic function to the test result for validation.

System for validating and monitoring semiconductor testing tools

To allocate products for machines on a manufacturing line, provide a standard test time. Minimize total test time with respect to production scheduling. Form a supply demand matrix table for products and machines for product allocation. Find the grid location with minimum testing time. Provide maximum time allocation from a machine at the corresponding position on the matrix table. Determine the grid location with the next minimum testing time. Loop back to provide a maximum allocation of remaining time from the corresponding machine and repeat looping back until no demand is left. Find need for an optimum testing process by testing whether only one machine can test the product and no quantity is allocated to a machine. If YES branch to calculate utilization per machine. If NO, decide whether N &plus;N &equals;NV . If YES perform optimum testing. If NO, branch to calculate machine utilization per machine.

Method for minimizing total test time for testing factories

A method for automatic scheduling of a production plan. The automatic scheduling system arranges different kinds of production plans and defines a first priority lot, a second priority lot and a normal lot in testing factories. The testing processes of the first priority lot is to decide the testing machine first, then exchanged with a running lot on this testing machine when a test piece is completed. For the second priority lot, after decides the testing machine, the second priority lot is exchanged with a running lot on the testing machine when the running lot is completed. For the normal lot, the procedure is to check if the testing machine is available and need to be setup, then use a setup reduce method to reduce the setup frequency if more than one machine is available and needs to be setup. The key to reduce setup method selects the testing machine which has minimum impact for the subsequent testing lot to get efficient use of the testing machine.

Method for automatic scheduling of production plan

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Hsinchu, Taiwan

Yao-Tung Liu