Au Optronics Corporation

Yao-Jiun Tsai

Ming-Hung Chuang

A pixel array substrate includes a substrate, pixels, and connection wires. The substrate has a transparent window, a wire region, and an active region. The connection wires are disposed in the wire region. Each connection wire is electrically connected to first signal lines of the pixels respectively located on two opposite sides of the transparent window. The connection wires include first and second wire groups. The first wire group includes first connection wires. Each first connection wire has a first segment and a second segment. A first insulation layer is disposed between the first and second segments that are electrically connected to each other. The second wire group includes second connection wires. The first segments of the first connection wires and the second connection wires are overlapped, and the first insulation layer is disposed between the first segments of the first connection wires and the second connection wires.

Pixel array substrate

A driving method, suitable for a display panel. The display panel includes a first display area, a second display area, a first gate driving circuit and a second gate driving circuit. The second display area comprises an opening. The driving method includes outputting a first gate signal to several first gate lines located at the first display area by the first gate driving circuit; outputting the first gate signal to several second gate lines located at the first display area by the second gate driving circuit, wherein the first gate lines and the second gate lines are arranged in an interlaced manner; outputting the first gate signal and a second gate signal to several third gate lines located at the second display area in the interlaced manner by the first gate driving circuit and the second gate driving circuit.

Display panel and driving method

A display panel includes a substrate, an opening, a first gate driving circuit, a second gate driving circuit, a plurality of first gate lines, a plurality of second gate lines, and a plurality of third gate lines. The substrate has a display area, a first peripheral region, and a second peripheral region. The opening is located in the display area. The first gate driving circuit is located in the first peripheral region. The second gate driving circuit is located in the second peripheral region. The first gate lines are located between the opening and the first gate driving circuit. The second gate lines are located between the opening and the second gate driving circuit. The third gate lines are located between the first gate driving circuit and the second gate driving circuit.

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Kaohsiung, Taiwan

Yao-Jiun Tsai