Advanced Semiconductor Engineering, Inc.

Yao-Hsin Feng

Su Tao

Kuan-Neng Liao

Chin-Chen Wang

Chun-Chi Lee

Shin-Hua Chao

Shyh-Ing Wu

Hou-Chang Kuo

Jaw-Shiun Hsieh

Chin-Pei Tien

The present invention relates to a semiconductor package having an optical device and a method of making the same. The package comprises a chip, an upper metal redistribution layer, a transparent insulating layer, and a lower metal redistribution layer. The chip has an active surface, a back surface, at least one through hole, an optical device, and at least one upper pad, wherein the optical device is electrically connected to the upper pad, and the through hole is filled with a metal post. An insulating layer is disposed between the wall of the through hole and the metal post. The upper metal redistribution layer is disposed on the active surface of the chip, and is used for connecting the upper pad and the metal post. The transparent insulating layer is disposed on the active surface of the wafer. The lower metal redistribution layer is disposed on the back surface of the chip, and is connected to the metal post. Whereby, the optical device is packaged, and the manufacturing process is simplified, and the cost is reduced.

Semiconductor package having an optical device and a method of making the same

A manufacturing method of a semiconductor wafer package mainly comprises the following steps. Firstly, a semiconductor wafer having a plurality of bonding pads and a passivation layer exposing the bonding pads is provided. Next, under bump metallurgy layers are formed on each of the bonding pads respectively. Then, a mask is formed above the semiconductor wafer to expose the under bump metallurgy layers through each of the openings of the mask. Afterwards, a plurality of bump structures are disposed separately in the openings wherein each of the bump structures has a bump and a reinforced layer covering the bump. Finally, a reflow step is performed so that each of the reflowed bumps is connected to the corresponding under bump metallurgy layer and the reinforced layers are transformed into bump-reinforced collars to cover the under bump metallurgy layers and encompass the bumps. In addition, a semiconductor wafer package, which is formed by the manufacturing method, is provided.

Semiconductor wafer package and manufacturing method thereof

A method of dicing a wafer is disclosed. A wafer with an active surface and a back surface is provided. Prior to dicing the wafer, a removable layer is formed on the back surface of the wafer. The removable layer is attached to a tape, such as a sawing tape. After the wafer is singulated and the adhesion of the removable layer is reduced or removed, the separate chips singulated from the wafer are easily removed from the tape. Because of the removable layer attached on the back surface of the wafer, the cutting stress caused by singulating the wafer will be transferred without concentrated at the back surface of the wafer so as to prevent the wafer from chipping and being warped.

Method of dicing a wafer

A heat-spread substrate consisting of a metal heat spreader and a substrate is disclosed. The metal heat spreader has a surface with a cavity, which is adapted for supporting a die. Such surface further includes a ground ring arranged at the periphery of the cavity; a substrate-supporting surface surrounding the periphery of the ground ring; a plurality of first ground pads arranged at the periphery of the substrate-supporting surface; and a plurality of second ground pads arranged on the substrate-supporting surface and protruding it. The substrate is provided on the substrate-supporting surface having a plurality of through holes. The through holes corresponds to the first ground pad so as to make it be located therein, respectively. The substrate further includes a plurality of mounting pads and a plurality of ball pads, in which the mounting pads are close to the cavity, and the first ground pad, the second ground pads and the ball pads are formed in the form of ball grid array and are coplanar roughly.

Heat-spread substrate

A laser method for forming vias comprises: providing a heat sink; locally oxidizing a surface of the heat sink into a copper oxide film; bonding a substrate onto the heat sink at the copper oxide layer locations, wherein the substrate comprises at least a patterned trace layer and an insulating layer to which is bonded the heat sink, the insulating layer comprising a plurality of through holes that expose the portions of the copper oxide film; removing the copper oxide exposed through the through holes by laser beam; disposing a plurality of solder balls respectively in the through holes; and reflowing the solder balls to form a plurality of vias.

Laser method for forming vias

A press plate mainly includes a plate and a probe. The plate has an opening which corresponds to a chip of the substrate and inner finger thereof, and the probe is elastically attached to the edge of the opening for wire bond checking. After the wire bonding process, the wire connecting the chip and the inner finger of the substrate and the probe of the wire bond checking system form a loop. Then a current is sent to the substrate from the wire bond checking system to check for the occurrence of wire occurring lift bond or missing wire.

Press plate of wire bond checking system

A base mainly includes a heating plate and a probe. The probe is attached to the surface of a heating plate which serves to place a substrate having an ball pad on a lower surface facing the probe of the heating plate. The probe contacts the ball pad of the lower surface of the substrate to form a closed loop for wire bond checking while the substrate is placed on the heating plate. When processing the wire bond, the wire connecting the chip and the ball pad of the substrate and the probe connecting to the wire bond checking system form a loop. Then a current is sent to the substrate from the wire bond checking system to check for wire lift bond or missed wire. When the wire bond checking system finds an occurrence of lift bond or missing wire, the wire bonding process stops immediately to avoid unnecessary wire bonding.

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Hualien, Taiwan

Yao-Hsin Feng