Huawei Technologies Co., Limited

Shenzhen China Star Optoelectronics Technology Co., Ltd.

Yansong Li

Lixuan Chen

Fan Wang

Jing Zhang

Zhen Zhang

Yun Zhang

Yanxue Wang

Xiaoming Zhu

Jiangtao Wang

Yulin Zheng

Guanghui Liu

A data loading system includes a processing circuit, a nonvolatile memory, and a programmable logic device. The processing circuit and the programmable logic device are separately coupled to different data interfaces of the nonvolatile memory. The nonvolatile memory stores start code of the processing circuit and configuration data of the programmable logic device, and the processing circuit and the programmable logic device are configured to respectively obtain the start code and the configuration data from the nonvolatile memory at the same time under the action of a first synchronization clock. Hence, the system increases a speed and reliability of data loading and increases a start speed and reliability of a board.

Data loading system

A storage apparatus accessed by using a memory bus is disclosed. The apparatus includes an interface controller, a storage module, a storage controller, a command register, a status register, and a buffer. In addition, the interface controller can be electrically connected to a memory module interface of a computer system. The interface controller receives an access command for accessing the storage module sent by a CPU. The interface controller writes the access command into the command register, and records a current access status or result by using the status register. The storage controller performs status setting on the status register according to the access command in the command register, and performs a corresponding read/write operation on the storage module.

Storage apparatus accessed by using memory bus

The present application discloses a detection system for image sticking of display panel and method thereof, includes obtaining the display panel image to be detecting the image sticking; obtaining the image display portion of the display panel in the display panel image; performing Fourier transform to the image display portion, obtaining a first spectral energy value with characteristic frequency corresponding to the image sticking in the image display portion, and a second spectral energy value of the reference frequency in the image display portion; determining the ratio of the first spectral energy value and the second spectral energy value is exceeding the numerical range of the corresponded qualified detection, if beyond, it is judged as disqualified. By the method described above, the present application can solve the conventional image sticking judgment based on human subjectivity, accurate judgment and objectively evaluation of severity the image sticking of the display panel.

Detection system for image sticking of display panel and method thereof

A memory extension system and method are provided. The system includes a processor, an extended memory, an extended chip, and multiple processor installation positions, where a memory installation position is provided in each processor installation position; the multiple processor installation positions are connected through a QuickPath Interconnect (QPI) interface, the processor is installed in at least one processor installation position, and at least one of the other processor installation positions is used as an extended installation position; the extended chip is installed in at least one extended installation position; and the extended memory is installed in a memory installation position. In this memory extension system, an extended chip is installed in another processor installation position, so that an existing processor can access an extended memory of the extended chip by using the extended chip. Thereby, a memory capacity of the existing processor increases while a processing capability does not increase.

Memory extension system and method

A method for detecting an interface connection between devices is disclosed, including setting a recommended working parameter of a first interface as a first working parameter; obtaining, by using an auto negotiation operation, a second working parameter of a second interface; determining whether the second working parameter is equal to the first working parameter, and if the second working parameter is not equal to the first working parameter, sending an alarm to indicate that a connection is unmatched; if the second working parameter is equal to the first working parameter, setting the recommended working parameter of the first interface as a third working parameter, sending, by using the auto negotiation operation, the third working parameter to the second interface, and receiving the third working parameter sent by a second device through the second interface, so that the first interface communicates with the second interface by using the third working parameter.

Method and apparatus for detecting interface connection between devices

A method and an apparatus for reducing a read latency are provided. The method includes: when one or more flash chips corresponding to a read command are in a busy state, setting data read from the one or more flash chips in a busy state to wrong data; obtaining, according to the wrong data and data read from other flash chips, reconstructed correct data, and reporting the correct data. By using the present invention, data read from a flash chip is set to wrong data, and reconstructed correct data is obtained according to the wrong data and data read from other flash chips. In this way, when the flash chip is in a busy state, it can be avoided that a read operation is blocked by an erase operation or a write operation, thereby effectively reducing latency and improving a performance of a storage system.

Method and apparatus for reducing read latency

The present invention discloses a method for backing up data in a case of a power failure of a storage system including: when a power failure is detected, acquiring current refresh progress of a buffer in a storage system, an address, in the buffer, of data that is in the buffer and needs to be backed up to a non-volatile memory in the storage system, and a first time required for backing up the data; calculating, according to the current refresh progress of the buffer and the address of the data in the buffer, a second time for which the data can at least keep being not lost since a last refresh; and stopping refreshing the buffer, and backing up the data to the non-volatile memory, if the second time is greater than the first time.

Method for backing up data in a case of power failure of storage system, and storage system controller

This invention discloses a hard disk data recovery method, apparatus, and system. The method includes: recording a logical block address corresponding to erroneous data if an error is discovered when data is read from the hard disk; performing a recovery operation for data at a first physical block address corresponding to the logical block address according to a preset algorithm to obtain recovered data; and sending an instruction of writing the recovered data into the logical block address to the hard disk so that the hard disk writes the recovered data into the logical block address according to the instruction, where the logical block address corresponds to a remapped second physical block address. Therefore, the method repairs an erroneous sector or a bad block of the hard disk quickly and improves efficiency of repairing the erroneous sector of the hard disk or the bad block of the hard disk.

Hard disk data recovery method, apparatus, and system

A method for setting a working mode of a multi-processor system includes: detecting, after a current board is inserted into a slot of the backplane, whether an associated board exists on the backplane; detecting, if the associated board exists, whether the associated board is in an independent working state; powering on the current board according to a slave working mode if the associated board is not in an independent working state, so as to work coordinately with the associated board; detecting, within a predetermined detection time if the associated board does not exist, whether a board is inserted into another slot of the backplane except the slot of the master board; and powering on the current board according to a master working mode if it is detected that the board is inserted, so as to work coordinately with the board in the other slot.

Method and apparatus for setting working mode of multi-processor system

The embodiments of the present invention disclose a nonvolatile memory and an electronic device, where each time the nonvolatile memory is powered on, an exchanger is used to implement a random exchange of at least one address subsignal and its inverted signal in a bank decoder and/or a row decoder in a bank and/or a column decoder in a bank, which causes that data stored before the nonvolatile memory is powered off is interrupted when the nonvolatile memory is powered off and then powered on and that data stored in the nonvolatile memory cannot be read sequentially from original storage addresses to achieve an encrypting effect and increase security of the data stored in the nonvolatile memory.

Nonvolatile memory and electronic device

Embodiments of the present invention disclose a PCI express device, and a link energy management method and device. The method includes: obtaining, by a first device, adjustment information for performing adjustment processing on a current rate and/or bit width of a PCI express link; stopping, by the first device, data sending, and clearing a master enable bit of a configuration space command register of a second device at an opposite end of the link, so that the second device stops data sending after current data sending is finished; performing, by the first device, adjustment processing on the rate and/or bit width of the link according to the adjustment information; resuming, by the first device, the data sending, and resetting the master enable bit, so that the first device and the second device send and receive data again at a rate and/or bit width that is obtained after the adjustment processing.

PCI express device and link energy management method and device

A write operation method for a phase change memory (PCM) is disclosed. The method includes when a PCM performs a write operation, generating a corresponding voltage pulse signal according to to-be-written data, and applying the voltage pulse signal to a phase change material included in a phase change storage unit corresponding to the to-be-written data and applying the voltage pulse signal to a voltage divider resistor serially connected to the phase change material; comparing voltage values at both ends of a sampling resistor with a threshold voltage to generate an indicator value; determining, according to the indicator value, whether data that is stored in the phase change storage unit and is corresponding to the indicator value is the same as the to-be-written data; and skipping writing if the same; or writing if different, thus reducing the delay time of writing data into the phase change storage unit.

Write operation method and device for phase change memory

The present invention discloses a method for adjusting device power consumption including: grouping multiple devices into at least one device group, setting a group power consumption ceiling threshold (PCCT) for the device group, and setting a device PCCT for each device in the group; obtaining current total power consumption of the group, and when the current total power consumption of the group exceeds the group PCCT, determining whether current power consumption of each device in the group exceeds the device PCCT of the device; when the current power consumption of each device exceeds the device PCCT of the device, reducing power consumption of each device to the device PCCT of the device; and when current power consumption of a device exceeds a device PCCT of the device, setting a new PCCT for the device, and reducing power consumption of the device to/or less than the new PCCT.

Method and apparatus for adjusting device power consumption

A method for transmitting keyboard, video, mouse (KVM) data includes converting, by a service board, KVM data into a KVM packet; sending the KVM packet to a switch board through a BASE channel, so that the switch board forwards the KVM packet to a remote console. The embodiments of the present invention are mainly applied to a process for implementing KVM data transmission based on ATCA architecture.

Method, service board, and system for transmitting KVM data

A redundant array of independent disks (RAID) controller includes a host interface, a processing core and a storage interface. The processing core is connected to a host and a hard disk. The RAID controller includes a halt control pin connected to the processing core and a control signal line in the host. The processing core receives a first level sent through the control signal line by the host when the hard disk is in a standby state, and halt an execution of a program in the processing core according to the first level; receives a second level sent through the control signal line by the host when the host receives a service request, and resume the execution of the program according to the second level; and receive the service request sent by the host and send the received service request to the hard disk to awaken the hard disk.

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Shenzhen, China

Yansong Li