International Business Machines Corporation

Yanqing Deng

Edward J Nowak

Richard Quimby Williams

James Johnson

Sungjae Lee

Jin Zheng Wallner

Paul A Hyde

Scott Keith Springer

Todd G McKenzie

The integrated circuit described herein includes: a first resistor having a first trench in a dielectric layer, the first trench having a first width; a second resistor having a second trench in the dielectric layer, the second trench having a second width not equal to the first width; a trench in a dielectric layer, a first conductive layer having a first TCR and coating at least a portion of the first trench and the second trench; and a second conductive layer having a second TCR and coating at least a portion of the first conductive layer in each of the first trench and the second trench, wherein the second TCR is not equal to the first TCR, and wherein the TCR of the IC is selected based on a dimension of the trench, a thickness of the first conductive layer, and a thickness of the second conductive layer.

Multi-layered integrated circuit with selective temperature coefficient of resistance

A system and method for developing condensed netlists for sub-circuits within an integrated circuit and for modeling the performance of the integrated circuit based on the condensed netlists rather than full netlists. An IC layout is segmented into a plurality of sub-circuits, each comprising a group of one or more of a given type of active devices connected to (i.e., sharing) the same electrical sub-circuit terminals through a similar resistive network (i.e. such that they are subjected to approximately the same overall combined parasitic resistances). Full netlists corresponding to the sub-circuits are extracted from the layout and condensed. Each condensed netlist accounts for performance variations (e.g., as a function of variations in operating power supply voltages, operating temperatures and, optionally, self-heating and/or stress) exhibited by the active devices and resistive network in a sub-circuit. The condensed netlists for the sub-circuits are then simulated over the full range of operating temperatures and full range of operating power supply voltages for the integrated circuit in order to generate a performance model for the integrated circuit.

System, method and program storage device for developing condensed netlists representative of groups of active devices in an integrated circuit and for modeling the performance of the integrated circuit based on the condensed netlists

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North Potomac, MD, United States of America

Yanqing Deng