Hangzhou Geo-Chip Technology Co., Ltd.

Yanping Zhou

Chun Geik Tan

Ruili Wu

Sy-Chyuan Hwu

The present disclosure provides a phase-locked loop, a frequency divider and a communication device that enable fast locking. The phase-locked loop comprises a phase frequency detector, a charge pump, a loop filter, a voltage-controlled oscillator, a fast-locking control unit and a frequency divider, wherein the frequency divider comprises a plurality of cascaded frequency division units and a reset/set control circuit, the reset/set control circuit being configured to receive the reset signal outputted by the fast-locking control unit, and in response to transition of the reset signal from a low level to the high level, change a state code combination composed of respective state codes of the cascaded frequency division units from the first state to the second state, to cause transition of a feedback signal outputted by the frequency divider from the low level to the high level. With the frequency divider and phase-locked loop, fast locking can be achieved.

Fast-locking phase-locked loop, frequency divider, and communication device

A fast-locking phase-locked loop comprises a phase frequency detector, a charge pump, a loop filter, a voltage-controlled oscillator, a frequency divider, and a fast-locking control unit which receives a reference clock signal at its first input terminal and a phase-locking enable signal at its second input terminal and outputs a reset signal at a high level in response to a rising edge of the reference clock signal when receiving the phase-locking enable signal, wherein the frequency divider is connected to an output terminal of the fast-locking control unit and configured to trigger generation of a feedback signal in response to the reset signal at the high level, and the phase frequency detector is connected to the output terminal of the fast-locking control unit and configured to output a phase error between the reference clock signal and the feedback signal in response to the reset signal at the high level.

Fast-locking phase-locked loop, transceiver, and communication device

The present disclosure relates to a fractional frequency divider, a radio frequency transceiver, and a method of configuring a phase delay in the fractional frequency divider. The fractional frequency divider comprises a counter, a multiplexer, and a delay module. The method is applicable to the fractional frequency divider. The radio frequency transceiver comprises the fractional frequency divider, and the fractional frequency divider adopts the method. According to the aforesaid technical solution, the present disclosure has advantages as follows: the embodiments of the present disclosure can minimize the timing inaccuracy and suppress the output jitter and output spurs; and the embodiments of the present disclosure can effectively extend the operating frequency range of the fractional frequency divider.

Fractional frequency divider, radio frequency transceiver, and method of configuring phase delay

The present disclosure provides a multi modulus frequency divider and an electronic device. The duty cycle adjusting circuit in the multi modulus frequency divider is configured to generate a second output clock signal according to a first output clock signal and an input modulus signal received by one or more frequency division units, the frequency of the second output clock signal is the same as that of the first output clock signal, and the duty cycle of the second output clock signal is different from that of the first output clock signal. The duty cycle of the clock signal output by the multi modulus frequency divider provided in the present disclosure is generally closer to 50%.

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Hangzhou, China

Yanping Zhou