Nxp B.v.

St-ericsson Sa

Yann Le Guillou

Volker Aue

Herve Marie

Sebastien Amiot

Bassem Fahs

Timothy John Ridgers

Fernand Courtois

Frederic Pirot

Hussein Fakhoury

A method of operating a multi-stream reception scheme, such as DOCSIS (Data Over Cable Service Interface Specifications), comprising at least two receivers () having respective voltage controlled oscillators (), the method including monitoring a change in local oscillator frequency in a selected one of the at least two streams and, if the frequency distance between the local oscillator frequencies is below a value likely to cause pulling or coupling between the voltage controlled oscillators of the at least two receivers, resetting the frequency planning of the selected one of the at least two streams to maximize the frequency distance of the voltage controlled oscillator of the selected stream with the voltage controlled oscillators of the or the other streams.

Method of operating a multi-stream reception scheme

In a method for processing a signal received by a receiver, at a first wireless receiver () a first signal (x(t), x(t)) comprising first and second signal components is received. The first signal component is intended for the first wireless receiver () and the second signal component is related to at least one of a sending signal (s(t)) generated by a transmitter () or to a second signal (x(t)) intended for a second wireless receiver (). To the first wireless receiver () a reference signal (r(t), r(t), r(t)) which is proportional to the sending signal (s(t)) or to the second signal (x(t)). At the first wireless receiver () and from the reference signal (r(t), r(t), r(t)) an estimation signal which estimates the second signal component is generated. A filtered signal (y(t), y(t)) is generated by subtracting the estimation signal from the first signal (x(t), x(t)).

System and method for processing a received signal

A system and method provide adaptive filtering of radio frequency (RF) signals. Multiple signals are received in a predetermined RF spectrum, the signals including a desired signal and multiple potentially interfering signals. A first signal of the potentially interfering signals is down-converted to a baseband signal, and a power of the baseband signal is determined. When the power exceeds a predetermined threshold power, a first notch filter, corresponding to a frequency of the first signal, is activated.

System and method for adaptive radio frequency filtering

A radio receiver comprises an input () for a modulated radio frequency signal, a frequency down converter () coupled to the input, the frequency down converter including quadrature mixers () for demodulating a received modulated radio frequency signal using a local oscillator signal. An analogue-to-digital converter () is coupled to receive demodulated signals from the mixing means. The analogue-to-digital converter, which may comprise a continuous time sigma delta converter, has an input for a sampling clock frequency (f s). A voltage controlled oscillator () provides the local oscillator signal and supplies a frequency divider () used to provide the sampling clock frequency. The dividing ratio (1/A) of the frequency divider is variable in response to variations in the strength of an 15 output signal from the digital-to-frequency converter and the variations in the frequency of the sampling clock frequency vary the gain of the analogue-to-frequency converter thereby providing automatic gain control.

Radio receivers

A basic symmetric &#x3a0;/2 phase-detector receives four control signals that control a differential current at the detector's output. Each respective control signal is a linear combination of a respective pair of signals chosen from a first input signal, its logic complement, a second input signal and the logic complement of the latter. Operation is based on time-averaging the differential current, the result being zero at a phase difference of &#x3a0;/2. By means of adding one or more additional current sources to the output, controlled by one or more of the control signals, the basic operation is skewed. The time-averaged output current is now made zero only at a value of the phase difference different from &#x3a0;/2. In an embodiment with uniform current sources and resistors, the modified detector is configured for a phase difference of &#x3a0;/2.

Phase-detector for detecting phase difference of [PI]2N

In a first aspect, the invention provides to a device comprising a substrate and an electrical conductor arranged between two terminals (A, B) and shaped for forming an inductor comprising at least two loops () and arranged such that, at least locally, the far field is reduced. This arrangement results in an inductor which radiates a smaller magnetic field, also referred to as reduced EMI, which results in less noise generated in other inductive parts of an electronic circuit or system. The invention further provides in an advantageous embodiment proper balancing of the parasitic resistance and capacitance. By doing so the physical mid-point of 8-shaped inductors becomes the electrical mid-point (MP) which is beneficial when the inductor is used in a circuit. In a second aspect the invention provides an electronic system comprising the device according to the invention, wherein the electronic system comprises an LC-based voltage-controlled oscillator comprising the inductor, the electronic system being one of a group comprising: a multi-channel TV-receiver, a full-duplex transceiver, and a co-banding system. All these systems benefit from the symmetrical properties of the inductor. The better far-field compensation leads to a smaller VCO pulling effect which leads to a better performance of the system.

8-shaped inductor

A continuous-time sigma-delta analog-to-digital converter (CV) comprises i) a signal path (SP) which includes at least one combiner (C) for combining analog signals to be converted with analog feedback signals, at least one integrator (H) for integrating the combined analog signals, a quantizer (Q) for converting the integrated signals into digital signals, and ii) a feedback path (FP) comprising at least a digital-to-analog converter (DAC) for converting the digital signals outputted by the quantizer (Q) into analog feedback signals intended for the combiner (C). It also comprises at least one non-invasive filter (N) associated to the integrator (H), connected in parallel to the signal path (SP) at a chosen location and arranged to introduce a notch into its signal transfer function by suppressing unwanted analog interference signals having a chosen frequency band that corresponds to this notch.

Continuous-time sigma-delta analog-to-digital converter with non-invasive filter(s) for immunity preservation against interferers

A continuous-time sigma-delta analog-to-digital converter (CV) including i) a signal path (SP) having at least one combiner (C) for combining analog signals to convert with feedback analog signals, at least two integrators (H, H), mounted in series, to integrate the combined analog signals, a quantizer (Q) for converting the integrated signals into digital signals, and a decimation filter (DF) for filtering digital signals, and ii) a feedback path (FP) having at least a digital-to-analog converter (DAC) for converting the digital signals output by the quantizer (Q) into feedback analog signals intended for the combiner (C). Each integrator (H, H) having variable capacitance means arranged to be set in chosen states defined by the values of a digital word, to present the chosen capacitances.

Continuous-time sigma-delta analog-to-digital converter with capacitor and/or resistance digital self-calibration means for RC spread compensation

An analog-to-digital converter (ADC) of the Sigma Delta type provides a stream of digital output samples (OUT) in response to an analog input signal (IN). The analog-to-digital converter (ADC) comprises a quantizer (QNT) that has a dead zone. The quantizer (QNT) provides a digital output sample that has a neutral value when the quantizer (QNT) receives an input signal whose amplitude is within the dead zone. A feedback path (DAC) within the analog-to-digital converter (ADC) provides a feedback action only in response to a digital output sample that has a value other than the neutral value.

Analog-to-digital converter of the sigma delta type

The present invention relates to a receiver apparatus, analog-to-digital converter apparatus, and method of converting an analog input signal into a digital output signal, wherein an additional direct feedforward path is introduced to compensate for peaking of feedforward structures while preserving frequency selectivity of the feedforward topology. In particular, the direct feedforward path () is provided with a scaling by a direct feedforward coefficient (ao) greater than zero and less than one. As a result, overshoot or peaking of classical feedforward topologies can be suppressed while providing interferer immunity, anti-aliazing effects and loop stability.

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Caen, France

Yann Le Guillou