Yann Deval

Andreia Cathelin

Denis Michael Flores Pazos

In various embodiments, a frequency dividing circuit is provided. The frequency dividing circuit may include a first circuit including an m-bit multiplexer configured to receive a positive binary word and a negative binary word as inputs. The frequency dividing circuit may receive a controlled oscillator output signal and a complement of the controlled oscillator output signal, generate a frequency dividing circuit output signal from the controlled oscillator output signal and the complement of the controlled oscillator output signal using the positive binary word and the negative binary word. A ratio of the frequency dividing circuit output signal frequency to the controlled oscillator output signal frequency is a decimal value greater than zero and less than one and is determined using a ratio of a value of the positive binary word to a sum of the value of the positive binary word and an absolute value of the negative binary word.

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Lege Cap-Ferret, France

Yann Deval