Intel Corporation

Mobileye Vision Technologies Ltd.

Yaniv Fais

Lev Faivishevsky

Jacob Subag

Tomer Bar-On

Jeremie Dreyfuss

Amit Bleiweiss

Tomer Schwartz

Uzi Sarel

Amitai Armon

Gal Leibovich

Ehud Cohen

Michael Behar

Yahav Shadmiy

Guy Jacob

Itamar Ben-Ari

Moshe Maor

Galina Ryvchin

Eran Ben-Avi

Neta Zmora

Eyal Yaacoby

Raanan Yonatan Yehezkel Rohekar

Gal Novik

Shira Hirsch

Zigi Walter

Orly Weisel

Yarden Oren

Amital Armon

Liran Levy

Ariel Binenfeld

Arik Gaon

Ashutosh Parkhi

A method, integrated circuit, and a computer readable medium that stores instructions for reducing IO traffic from a global or remote memory unit to a buffer of a neural network unit, by using overlap rows of an input feature map tile.

Applying a two dimensional (2D) kernel on an input feature map

The present subject matter provides technical solutions facing technical problems associated with preserving spatial dimension of images used in CNNs. Transposed convolutional layers may be used to provide improved spatial dimension preservation or reconstruction. In contrast with image interpolation, transposed convolutional layers may use a set of weights to reconstruct input images. When using CNNs for ADAS and AV applications, the transposed convolutional layers may be trained jointly with convolutional layers during the CNN training process. This may provide the ability to use a lower-dimensional representation of input images, while preserving the spatial dimension of images for use in ADAS and AV systems.

Transposed convolution on downsampled data

An example apparatus to perform a convolution on an input tensor includes a parameters generator to: generate a horizontal hardware execution parameter for a horizontal dimension of the input tensor based on a kernel parameter and a layer parameter; and generate a vertical hardware execution parameter for a vertical dimension of the input tensor based on the kernel parameter and the layer parameter; an accelerator interface to configure a hardware accelerator circuitry based on the horizontal and vertical hardware execution parameters; a horizontal Iterator controller to determine when the hardware accelerator circuitry completes the first horizontal iteration of the convolution; and a vertical Iterator controller to determine when the hardware accelerator circuitry completes the first vertical iteration of the convolution.

Methods and apparatus to tile walk a tensor for convolution operations

In an example, an apparatus comprises a plurality of execution units comprising and logic, at least partially including hardware logic, to receive a plurality of data inputs for training a neural network, wherein the data inputs comprise training data and weights inputs; represent the data inputs in a first form; and represent the weight inputs in a second form. Other embodiments are also disclosed and claimed.

Real time context dependent deep learning

An improved convolution kernel system and method may be used to improve performance of analysis of input image data for autonomous or semi-autonomous vehicle navigation. A processing circuit may be used to apply a convolution kernel on the input data to provide output data that comprises output data segments. The application may include repeating scanning and summing, including parallel scanning input data segments of the different input channels and of the input data depth value to provide first intermediate results associated with the input data depth value, and summing first intermediate results associated with a same output data channel and with different input depth values to provide, per each output data channel, a second result. The output analyzed image data may be used to generate a vehicle control signal, such as automatic control of braking, acceleration, or steering of a vehicle.

Applying a convolution kernel on input data

A convolutional neural network (CNN) accelerator, including: a CNN circuit for performing a multiple-layer CNN computation, wherein the multiple layers are to receive an input feature according to an input feature map (IFM) and a weight matrix per output feature, wherein an output of a first layer provides an input for a next layer; and a mapping circuit to access a three-dimensional input matrix stored as a Z-major matrix; wherein the CNN circuit is to perform an inner-product direct convolution on the Z-major matrix, wherein the direct convolution lacks a lowering operation.

Inner product convolutional neural network accelerator

In an example, an apparatus comprises logic, at least partially including hardware logic, to implement a lossy compression algorithm which utilizes a data transform and quantization process to compress data in a convolutional neural network (CNN) layer. Other embodiments are also disclosed and claimed.

Low rank matrix compression

In an example, an apparatus comprises a plurality of execution units comprising and logic, at least partially including hardware logic, to traverse a solution space, score a plurality of solutions to a scheduling deep learning network execution, and select a preferred solution from the plurality of solutions to implement the deep learning network. Other embodiments are also disclosed and claimed.

Scheduling configuration for deep learning networks

In an example, an apparatus comprises a plurality of execution units comprising at least a first type of execution unit and a second type of execution unit and logic, at least partially including hardware logic, to expose embedded cast operations in at least one of a load instruction or a store instruction; determine a target precision level for the cast operations; and load the cast operations at the target precision level. Other embodiments are also disclosed and claimed.

Variable precision and mix type representation of multiple layers in a network

A mechanism is described for facilitating memory handling and data management in machine learning at autonomous machines. A method of embodiments, as described herein, includes detecting multiple tables associated with multiple neural networks at multiple autonomous machines, where each of the multiple tables include an index. The method may further include combining the multiple tables and multiple indexes associated with the multiple tables into a single table and a single index, respectively, where the single table is communicated to the multiple autonomous machines to allow simultaneous processing of one or more portions of the single table using one or more memory devices and one or more processors of one or more of the multiple autonomous machines.

Smart memory handling and data management for machine learning networks

In an example, an apparatus comprises logic, at least partially including hardware logic, to save one or more outputs of a deep learning neural network in a storage system of an autonomous vehicle and upload the one or more outputs to a remote server. Other embodiments are also disclosed and claimed.

Storage system of DNN outputs for black box

In an example, an apparatus comprises a plurality of execution units and logic, at least partially including hardware logic, to gate at least one of a multiply unit or an accumulate unit in response to an input of value zero. Other embodiments are also disclosed and claimed.

Multiply-accumulate '0' data gating

In an example, an apparatus comprises logic, at least partially including hardware logic, to implement a lossy compression algorithm which utilizes a data transform and quantization process to compress data in a convolutional neural network (CNN) layer.

Growing community of inventors

Tel Aviv, Israel

Yaniv Fais