Intel Corporation

Apple Inc.

Yaniv Cohen

Ofir Degani

Elan Banin

Michael Kerner

Igal Kushnir

Alexander Belitzer

Yaron Yoffe

A clock generator calibration system can include a phased-locked loop and a correction circuit. The PLL can generate an output clock signal, and the correction circuit can adjust a frequency signal of the PLL based on a digital signal of the PLL. The digital signal can be generated based on the adjusted frequency signal.

Systems and methods for calibrating digital phase-locked loops

A transmitter is provided. The transmitter includes an envelope tracking circuit, wherein the envelope tracking circuit includes an envelope circuit configured to generate, based on a baseband signal, an envelope signal indicating a temporal course of the baseband signal's envelope. Further, the envelope tracking circuit includes a bandwidth reduction circuit configured to generate a bandwidth reduced envelope signal based on the envelope signal, and a DC-to-DC converter configured to generate a supply voltage for a power amplifier of the transmitter based on the bandwidth reduced envelope signal. The transmitter additionally includes a predistortion circuit configured to generate a predistorted baseband signal based on the baseband signal and an adjustable predistortion configuration. The predistortion circuit is further configured to adjust the predistortion configuration based on the bandwidth reduced envelope signal.

Transmitters and methods for operating the same

Growing community of inventors

Hod Hasharon, Israel

Yaniv Cohen