Western Digital Technologies, Inc.

Sandisk Information Technology (shanghai) Co., Ltd.

Sandisk Technologies Inc.

Yangming Liu

Ning Ye

Bo Yang

Chin-Tien Chiu

Shenghua Huang

Zhongli Ji

Hem P Takiar

Tong Zhang

Chih-Chin Liao

Shrikar Bhagath

Cong Zhang

Yazhou Zhang

Warren Middlekauff

Zengyu Zhou

Shineng Ma

Ye Bai

Yanwen Bai

Sean Lau

Shaopeng Dong

A semiconductor device includes a substrate, semiconductor dies on the substrate, molding compound and a reinforcing layer suspended within the molding compound. The reinforcing layer may for example be a copper foil formed in the molding compound over the semiconductor dies during the compression molding process. The reinforcing layer may have a structural rigidity which provides additional strength to the semiconductor device. The reinforcing layer may also be formed of a thermal conductor to draw heat away from a controller die within the semiconductor device.

Semiconductor device including a suspended reinforcing layer and method of manufacturing same

A data storage device includes an enclosure and a Printed Circuit Board Assembly (PCBA) extending in a basal plane, and a plurality of semiconductor memory packages electromechanically bonded to the PCBA and coupled to the enclosure with thermal interface material. The data storage device further includes a first fitting coupled to a first end of the PCBA and the enclosure, restricting movement of the PCBA in the basal plane with respect to the enclosure and restricting movement of the PCBA out of the basal plane. The data storage device further includes a second fitting coupled to a second end of the PCBA, allowing movement of the PCBA in the basal plane with respect to the enclosure and restricting movement of the PCBA out of the basal plane.

Enclosure fitting for electronic device

The present disclosure generally relates to a flip chip assembly having a bump that reduces stress levels in a low-k dielectric layer in the flip chip. Rather than having a single, large area plateau that interfaces with a large corresponding opening of an insulating layer in the flip chip, the bump includes a plurality of much smaller pillars that interface with a corresponding plurality of openings in the insulating layer. In so doing, the low-k layer within the flip chip experiences much less stress and hence, fewer failures.

Flip chip bump with multi-PI opening

A semiconductor device package includes a substrate having a top planar surface and a first semiconductor die electrically connected to the top planar surface of the substrate. The first semiconductor die and substrate define a tunnel and a first molding compound encapsulates the first semiconductor die and fills the tunnel. A second molding compound that is separate and distinct from the first molding compound is mounted on a top surface of the first molding compound. The first molding, when in a flowable state, has a viscosity that is lower than a viscosity of the second molding compound when it is in a flowable state.

Semiconductor device package having multi-layer molding compound and method

A semiconductor device is disclosed having reinforced supports at corners of the device. The semiconductor device may include solder balls on a lower surface of the device for soldering the device onto a printed circuit board. In one example, the solder balls at the corners of the semiconductor device may be replaced by support billets having more mass and more contact area between the semiconductor device and the PCB. In a further example, screws may be provided at the corners of the device (instead of the corner solder balls or in addition to the corner solder balls). These screws may be placed through the corners of the semiconductor device and into the printed circuit board.

Semiconductor device including reinforced corner supports

A semiconductor device including control switches enabling a semiconductor die in a stack of semiconductor die to send or receive a signal, while electrically isolating the remaining die in the die stack. Parasitic pin cap is reduced or avoided by electrically isolating the non-enabled semiconductor die in the die stack.

Semiconductor device including control switches to reduce pin capacitance

A semiconductor device is disclosed including one or more semiconductor dies mounted on substrate. Each semiconductor die may be formed with a ferromagnetic layer on a lower, inactive surface of the semiconductor die. The ferromagnetic layer pulls the semiconductor dies down against each other and the substrate during fabrication to prevent warping of the dies. The ferromagnetic layer also balances out a mismatch of coefficients of thermal expansion between layers of the dies, thus further preventing warping of the dies.

Semiconductor device including magnetic hold-down layer

A substrate semiconductor layer is attached to a carrier substrate through a sacrificial bonding material layer. A plurality of semiconductor dies included within continuous material layers are formed on a front side of the substrate semiconductor layer. Each of the continuous material layers continuously extends over areas of the plurality of semiconductor dies. A plurality of dicing channels is formed between neighboring pairs among the plurality of semiconductor dies by anisotropically etching portions of the continuous material layers located between neighboring pairs of semiconductor dies. The plurality of dicing channels extends to a top surface of the sacrificial bonding material layer. The sacrificial bonding material layer is removed selective to materials of surface portions of the plurality of semiconductor dies using an isotropic etch process. The plurality of semiconductor dies is singulated from one another upon removal of the sacrificial bonding material layer.

Semiconductor die singulation using a sacrificial bonding material layer and an anisotropic channel etch

A semiconductor device is disclosed including at least first and second vertically stacked and interconnected groups of semiconductor packages. The first and second groups of semiconductor packages may differ from each other in the number of packages and functionality.

Growing community of inventors

Shanghai, China

Yangming Liu