Southwest Petroleum University

University of Electronic Science and Technology of China

Cnpc Bohai Drilling Engineering Company Limited

China Railway Eryuan Engineering Group Co., Ltd.

Yang Yu

Bo Zhang

Ming Qiao

Xiaowei Cheng

Kaiqiang Liu

Zaoyuan Li

Xiaoyang Guo

Zhengkang Wang

Chunmei Zhang

Gaoyin Zhang

Sheng Huang

Wentong Zhang

Zuwei Chen

Wenming Liu

Jiawen Fu

Ben Qi

Tianpeng Zuo

Zhihui Lin

Zhenya Zhan

Chaoming Wu

Shuxun Zhao

Qing Luo

Qinghua Zeng

Zicheng Zhao

Yi Xie

Jianming Liu

Qinghai Zhao

Hongwei Zhang

Jianqing Niu

Liqun Huang

The present invention relates to a process for preparing a metal-chelate retarder by a sol-gel method. The method comprises the following steps: weighing calcium nitrate tetrahydrate, aluminum nitrate nonahydrate and ferric nitrate nonahydrate according to a certain mass ratio and adding them into deionized water; placing the mixed solution on a magnetic stirrer and stirring the mixed solution evenly; adding citric acid monohydrate or gluconic acid, ethylene glycol or glycerol, and placing the mixed solution into a water bath to react to obtain the metal-chelate retarder. The process of the present invention has a reliable principle, overcomes the defects of long production period, complex preparation and the like of the existing retarders, has the advantages of simple process operation, cheap and easily available raw materials, and short production period. The prepared retarder has wide temperature adaptation range and adjustable thickening time, is suitable for large-scale industrial production, and has a wide market application prospect.

Process for preparing metal-chelate retarder by sol-gel method

The present invention relates to a lateral high-voltage device. The device includes a dielectric trench region. A doping-overlapping structure with different doping types alternating mode is provided at least below, on a left side of, or on a right side of the dielectric trench region. The device also includes a dielectric layer, a body field plate, a polysilicon gate, a gate oxide layer, a first N-type heavy doping region, a second N-type heavy doping region, a P-type heavy doping region, a P-well region, the first N-type doping pillar, the second N-type doping pillar, the third N-type doping pillar, the first P-type doping pillar, and the second P-type doping pillar. The invention adopts a dielectric trench region in the drift region to keep the breakdown voltage BV of the device while reducing the surface area of the device, and effectively reducing the device's specific On-Resistance R.

Lateral high-voltage device

Growing community of inventors

Chengdu, China

Yang Yu