Samsung Display Co., Ltd.

Samsung Electronics Co., Ltd.

Samsung Displayco., Ltd.

Yang-Hwa Choi

Cheol-Gon Lee

Cheol-Min Kim

Junghwan Hwang

Seung-Kyu Lee

Junhyun Park

Jun Hyun Park

Kyoung-Ju Shin

Chul-Ho Kim

Sang-uk Lim

Sung-Hwan Kim

Kyung-Hoon Kim

Hyuk Hwan Kim

Jun-Hyun Park

Se-Hyang Kim

Oh-Kyong Kwon

Soon-Dong Kim

Il-Gon Kim

Minwoo Byun

Minjoo Kim

Keum Nam Kim

Seong-il Park

Cheolgon Lee

Kyonghwan Oh

Doo-Hyung Woo

Sang-Uk Lim

Gi-Chang Lee

Sung-hwan Kim

Kee-chan Park

Hyung-Ryul Kang

Donghwan Jeon

Shang-Min Yhee

Zhi Feng Zhan

Seong-Ii Park

A gate driver includes a plurality of stages. At least one of the stages includes a control circuit configured to control a first control node in response to a first carry clock signal, a node separation transistor connected between the first control node and a second control node, a carry output circuit configured to output a carry signal in response to a voltage of the second control node, and a plurality of gate output circuits configured to output a plurality of gate signals having different timings in response to the voltage of the second control node.

Gate driver

An electronic device includes a pixel driving circuit to operate in a light emitting mode or a sensing mode and including a reference voltage line for receiving a reference voltage comprising a first reference voltage and a second reference voltage different from the first reference voltage and a light emitting diode including a first electrode, a light emitting element, and a second electrode. The light emitting diode has in an on-state or an off-state in the light emitting mode, the first reference voltage is applied to the reference voltage line in the light emitting mode, a first voltage is applied to the first electrode in the off-state, a second voltage is applied to the first electrode in the on-state, the sensing mode includes an initialization period and a sensing period, and the second reference voltage is applied to the reference voltage line in the initialization period.

Electronic device

A display device includes a plurality of pixels connected to a plurality of first scan lines, a plurality of second scan lines, and a plurality of data lines, where the pixels are arranged in a plurality of rows, a plurality of first stages connected to the first scan lines, a plurality of second stages connected to the second scan lines, and a data driver connected to the data lines. Each of the first scan lines is connected to pixels arranged in a corresponding row among the rows. Each of the second scan lines is commonly connected to pixels arranged in corresponding 8h rows among the plurality of rows, where h is a natural number.

Display device including pixels driven at different frequencies and driving method thereof

A pixel includes a first transistor, a second transistor, a third transistor, a capacitor, and a light emitting diode. During a non-emission period of a low frequency mode, the third transistor electrically connects a first terminal of the light emitting diode to an initialization voltage line in response to a second scan signal. An initialization voltage transferred from the initialization voltage line has a first voltage level during a normal mode different from the low frequency mode, and has a second voltage level different from the first voltage level during the non-emission period of the low frequency mode.

Display device

A display device includes a display panel including a pixel and a panel driver which drives the display panel at a first panel frequency in a first driving mode and drives the display panel at a second panel frequency in a second driving mode. The pixel includes a light emitting element and first, second, third, and fourth transistors. The first transistor is connected between a power line and the light emitting element. The second transistor is connected between a data line and the first transistor and receives a first scan signal. The third transistor is connected between the first transistor and an initialization voltage line and receives a second scan signal. The fourth transistor is connected between the first transistor and a reset voltage line and receives a third scan signal. The third scan signal is inactivated in the first driving mode and is activated in the second driving mode.

A scan driver includes a plurality of stages, each including a first input part configured to transfer an input signal to a first set node in response to a second clock signal, a second input part configured to transfer a first clock signal to a first reset node in response to the input signal and the second clock signal, a first output part configured to output a third clock signal as a respective scan signal in response to a voltage of a second set node, a second output part configured to output a concurrent driving signal as the respective scan signal in response to a voltage of a second reset node, a first stress relieving transistor connected between the first set node and the second set node, and a second stress relieving transistor connected between the first reset node and the second reset node.

Scan driver and display device including the same

A display device including: a scan driver that transmits scan signals to scan lines; a data driver that data signals to data lines; and a display portion that includes pixels, respectively connected to the corresponding scan lines and corresponding data lines, and displays an image by the pixels that simultaneously emit light according to the corresponding data signals, wherein each of pixels includes: an organic light emitting diode; a first transistor that includes a gate connected to a first node, and is connected between first power and an anode of the organic light emitting diode; a second transistor that includes a gate connected to a corresponding scan line and transmits the corresponding data signal to the first node; and a first capacitor that is connected to the first node, and stores a data voltage according to the data signal.

Display device and method for driving the same

A display panel includes a plurality of pixels each including a first transistor between a first node and a second node and having a gate electrode to receive the scan signal, a second transistor between the second node and a third node in series with the first transistor and having a gate electrode to receive the initialization control signal, a driving transistor between the first power voltage providing line and the third node and having a gate electrode connected to the first node, a third transistor between the third node and a fourth node and having a gate electrode to receive the emission control signal, an organic light emitting diode, between the fourth node and the second power voltage providing line, a first capacitor between the first power voltage providing line and the first node, and a second capacitor between the second node and one of the data lines.

Pixel and organic light emitting display device having the same

A pixel circuit includes three transistors, a capacitor, and an OLED. The first transistor includes a gate terminal for receiving a first control signal, a first terminal connected to a first node, and a second terminal connected to a second node. The second transistor includes a gate terminal for receiving a second control signal, a first terminal connected to the second node, and a second terminal connected to a third node. The third transistor includes a gate terminal connected to the first node, a first terminal for receiving a first power signal, and a second terminal connected to the third node. The capacitor may receive an initialization signal and is connected to the first node. The OLED is connected to the third node and may receive a second power signal. The control signals have same voltage levels in a data writing period and have different voltage levels in other periods.

Pixel circuit and organic light emitting display device including the pixel circuit

An emission control driver includes a plurality of stages configured to output a plurality of emission control signals, respectively. Each stage includes an input circuit for receiving a previous emission control signal from one of previous stages or a vertical start signal, and configured to control a voltage of a first node and a voltage of a second node in response to a first clock signal; a stabilizing circuit for stabilizing the voltage of the first node in response to the voltage of the second node and a second clock signal; a voltage adjusting circuit connected between the second node and a third node, configured for boosting the voltage of the second node, and controlling the boosted voltage of the second node; and an output circuit configured to control an emission control signal in response to the voltage of the first node and a voltage of the third node.

Emission control driver and display device having the same

A gate driver includes a plurality of stages outputting a plurality of gate output signals, respectively. Each stage includes a first input circuit applying an input signal to a first node in response to a first clock signal, a second input circuit applying the first clock signal to a second node in response to a voltage of the first node, a first output circuit controlling a gate output signal to a first logic level in response to the voltage of the first node, a second output circuit controlling the gate output signal to a second logic level in response to a voltage of the second node, and a leakage current blocking circuit applying a first power voltage corresponding to the first logic level to the first input circuit in response to the voltage of the first node.

Gate driver and display device having the same

A foldable display according to the present disclosure includes: a substrate having a folding portion which is folded; and a plurality of transistors in the substrate each of the transistors including: a gate electrode on the substrate; a channel overlapping the gate electrode; and a source electrode and a drain electrode positioned at respective sides of the channel, wherein the gate electrode is divided into a plurality of sub-gate electrodes by at least one gate cutout.

Foldable display

An organic light-emitting diode (OLED) display panel is disclosed. In one aspect, the panel includes a first transistor which receives a data signal transferred through a data line in response to a scan signal transferred through a gate line and a second transistor which receives a first power signal in response to a bias signal and outputs a source-driving signal. The panel also includes a third transistor which receives the source-driving signal in response to an output signal of the first transistor and outputs a driving signal, an organic light-emitting element which comprises a first electrode being connected to the third transistor and which receives the driving signal and a second electrode which receives a second power signal. The panel further includes a fourth transistor which is electrically connected to the third transistor and which receives the driving signal.

Organic light-emitting diode (OLED) display panel for decreasing off-leakage current and OLED display having the same

An organic light emitting display device includes: pixels at crossing regions of data lines and scan lines, each of the pixels including an organic light emitting diode (OLED); a scan driver configured to drive the scan lines; a data driver configured to drive the data lines; a control line driving unit configured to drive control lines; and a compensation unit configured to extract at least one of deterioration information of the OLED or threshold voltage information of a driving transistor from at least one of the pixels during a sensing period. The data driver is further configured to supply a same first data signal to each of the pixels other than the at least one of the pixels in the sensing period.

Growing community of inventors

Yongin-si, South Korea

Yang-Hwa Choi