Silicon Motion, Inc.

Yang-Chih Shen

Tsung-Chieh Yang

Ching-Hui Lin

Chun-Chieh Kuo

Po-Sheng Chou

Che-Wei Hsu

Sheng-I Hsu

Ching-Ke Chen

Ching-Chin Chang

Ting-Hsing Wang

Yu-Han Hsiao

Huan-Jung Yeh

Shih-Chang Chang

Jian-Yu Chen

Wei-Lin Kao

Hou-Yun Lee

A flash memory controller for controlling a flash memory module includes a communication interface for receiving a first data and a second data; and a processing circuit for dynamically controlling a data writing mode of the flash memory module according to an amount of stored data in the flash memory module. If the amount of stored data in the flash memory module is less than a first threshold when the communication interface receives the first data, the processing circuit controls the flash memory module so that the first data is written into the first data block under an one-bit-per-cell mode. If the amount of stored data in the flash memory module is greater than the first threshold when the communication interface receives the second data, the processing circuit controls the flash memory module so that the second data is written into the second data block under a two-bit-per-cell mode.

Flash memory controller

A high-performance data storage device is disclosed. A controller updates a sub mapping table on the temporary storage in response to a write command of the non-volatile memory issued by a host. The mapping sub-table corresponds to a logical group involved in the write command and is downloaded from the non-volatile memory. When the mapping sub-table has not been completely downloaded to the temporary storage memory, the controller pushes the write command to a waiting queue to avoid dragging the performance of the data storage device.

Data storage device and control method for non-volatile memory

High performance data storage device is disclosed, which has a memory controller dynamically updating mapping information on the temporary storage to manage physical space information mapped to a logical address recognized by a host. The memory controller uses a first bit to an Nbit of the physical space information to indicate a physical space of the non-volatile memory or a cache address of the data cache space, without using additional bits to map the physical space information to the non-volatile memory or the data cache space, where N is a number greater than one. Among numbers formed by the first to the Nbit, the memory controller uses numbers corresponding to non-existent physical space of the non-volatile memory to map the physical space information to the non-volatile memory or the data cache space.

A write control method, an associated data storage device and the controller thereof are provided. The write control method includes: receiving one or more commands from a host device and executing the one or more commands, and performing determining operations to generate determining results; in response to the determining results, starting performing write collection; collecting and handling one or more write commands to buffer data of the one or more write commands through a buffer memory, and performing other determining operations to generate other determining results; in response to the other determining results, according to a quantity of one or more collected and handled write commands, determining whether data thereof has filled up a write buffer region of the buffer memory; and in response to the data having filled up the write buffer region, flushing the write buffer region to write the data therein into a non-volatile memory.

Write control method, associated data storage device and controller thereof

A data storage device with a non-volatile memory on which a garbage collection operation is segmented to be accomplished at separate time intervals. Host commands are inserted to be executed between the separate time intervals. A data swap stage or/and an F2H table update stage or/and an H2F table update stage for a garbage collection operation may be segmented to be performed at separate time intervals.

Data storage device and operating method thereof, wherein mapping table for valid data of source block that has not been copied to destination block has a higher priority than mapping information collected by reverse scanning from end of the destination block

A method for scheduling read commands, performed by a processing unit, includes at least the following steps: receiving a logical read command and a logical address; obtaining a high-level mapping table; obtaining a mapping table block according to the logical address and the high-level mapping table; obtaining a first physical address according to the logical address and the mapping table block; outputting an actual read command and the first physical address to a storage unit to obtain a data; and outputting the data which is responsive to the logical read command. The high-level mapping table includes a plurality of records, and one of the records is utilized to illustrate a second physical address of the mapping table block.

Methods for scheduling read commands and apparatuses using the same

A data storage device with a non-volatile memory on which a garbage collection operation is segmented to be accomplished at separate time intervals. Host commands are inserted to be executed between the separate time intervals. A data swap stage or/and an FH table update stage or/and an HF table update stage for a garbage collection operation may be segmented to be performed at separate time intervals.

Data storage device and operating method thereof wherein update to physical-to-logical mapping of destination block is restarted when closing active block

The invention introduces a method for caching and reading data to be programmed into a storage unit, performed by a processing unit, including at least the following steps. A write command for programming at least a data page into a first address is received from a master device via an access interface. It is determined whether a block of data to be programmed has been collected, where the block contains a specified number of pages. The data page is stored in a DRAM (Dynamic Random Access Memory) and cache information is updated to indicate that the data page has not been programmed into the storage unit, and to also indicate the location of the DRAM caching the data page when the block of data to be programmed has not been collected.

Methods for caching and reading data to be programmed into a storage unit and apparatuses using the same

A data storage method includes steps of: selecting an active block to store data from a host; determining whether a power drop/loss event has occurred; when it is determined that a power drop/loss event has occurred, recording an index of the active block and an index of a last data-containing page in the active block; generating a primary F2H mapping table; and writing the primary F2H mapping table, the index of the active block and the index of the last data-containing page into a designated block. A data storage device and a data recovery program are also provided.

Storing a compact flash physical-to-host logical address mapping table on power loss

An embodiment of a method for accessing a storage unit of a flash memory, performed by an arbiter, is disclosed to include at least the following steps. After transmitting data to first storage units each connected to one of storage-unit access interfaces in a first batch, the arbiter issues a data write command to each first storage unit, thereby enabling each first storage unit to start a physical data programming. During the physical data programming of each first storage unit, data is transmitted to second storage units each connected to one of the storage-unit access interfaces in a second batch.

Data programming for a data storage medium using horizontal and vertical error correction codes

A data storage device includes a flash memory and a controller. The flash memory includes a plurality of chips, each of the chips includes a plurality of pages, the pages are arranged to assemble into a super block, the pages of the super block are numbered 0&#x2dc;X from top to bottom of the super block, the pages with number 0&#x2dc;Y&#x2212;1 constitute a data area, and the pages with numbers Y&#x2dc;X constitute a RAID parity area. The controller corrects data of the data area according to data of the RAID parity area when the data in the data area cannot be successfully read.

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Taipei, Taiwan

Yang-Chih Shen