International Business Machines Corporation

Wuhan Tianma Micro-electronics Co., Ltd

Wuhan Tianma Microelectronics Co., Ltd. Shanghai Branch

Xepic Corporation Limited

Yan Lu

Jinghua Niu

Wei Gao

Lei Zhang

Heng Liu

Hongyan Zhu

Chen Qian

Xiang Sean Zhou

Ping An

Gaojun Huang

Wenpeng Dai

Peng Fei Gou

Yang Fan Liu

Jin Zhu

Zhen Peng Zuo

Pei Xing Ji

Yun Qi Li

Ying Liu

Qing Zhu

Xue Ling Mi

Xiangcheng Wang

He Wang

Xia Li

Wenjing Xiao

Dongyang Deng

Yang Li

Jia Zhu

Changxuan Fan

Provided are a boron-silicon heterocyclic compound having a structure represented by formula 1, a display device and a display apparatus. In formula 1, Land Lare each a single bond, C6-C30 arylene, C6-C30 fused arylene, C4-C30 heteroarylene, or C4-C30 fused heteroarylene; Dand Dare each a substituted or unsubstituted C6-C60 aryl, a substituted or unsubstituted C4-C60 heteroaryl, a substituted or unsubstituted C10-C60 fused aryl, a substituted or unsubstituted C8-C30 fused heteroaryl, or a substituted or unsubstituted diphenylamino. The compound has a strong inductive effect and can reduce the driving voltage of the device. The silacyclopentadiene having a silicon atom as spiro-atom can effectively improve the solubility of the material, which is beneficial to the cleaning of the vapor deposition mask. In addition, the compound has a higher triplet energy level to effectively transfer energy to the luminous body, and improves the efficiency of the device.

Compound, display panel and display apparatus

The present disclosure provides a compound having a formula (I): wherein Crepresents substituted or unsubstituted C5-C40 aryl; X represents oxygen atom or sulfur atom; Lis selected from substituted or unsubstituted C5-C40 aryl, or substituted or unsubstituted C3-C40 heteroaryl; A includes a structure represented by formula (II): wherein each of Land Lis independently selected from substituted or unsubstituted C5-C40 aryl, or substituted or unsubstituted C3-C40 heteroaryl; each of Ar, Ar, and Aris independently selected from substituted or unsubstituted C5-C40 aryl, substituted or unsubstituted C3-C40 heteroaryl, or substituted or unsubstituted arylamine containing one or two nitrogen atoms; each of m, q, and r is independently selected from 0 or 1; and * indicates a connection position.

Compound, organic electroluminescent device, and display device

The present disclosure describes an electroluminescent material which is formed of a compound having a structure of Formula (I), an OLED display panel utilizing the compound and an electronic device having the OLED display panel. The OLED display panel includes a first electrode, a second electrode, and an organic thin film layer disposed between the first electrode and the second electrode. The organic thin film layer comprises an electron transport layer which comprises any one or a combination of at least two of the compounds. The electroluminescent material has a triplet energy level Eof &#x2265;2.7 eV, a HOMO energy level of &#x2264;&#x2212;5.85 eV, and a glass transition temperature of &#x3e;120&#xb0; C. This compound improves luminous efficiency in the OLED display panel and the electronic device.

Compound, OLED display panel and electronic device

A method for debugging a logic system design including a target module to be debugged. The method includes receiving a first gate-level netlist associated with the logic system design and a second gate-level netlist associated with the target module that are generated based on a description of the logic system design, obtaining runtime information of an input signal of the target module by running the first gate-level netlist, and obtaining runtime information of the target module by running the second gate-level netlist based on the runtime information of the input signal of the target module.

Method, emulator, and storage media for debugging logic system design

The present disclosure belongs to the technical field of organic light-emitting diods (OLEDs), and provides a compound used as an electron transmission material of OLEDs. Molecules of the compounds include an aromatic ring (or aromatic fused ring) and a phenanthroline group that are connected to each other. In an embodiment, the compound according to the present disclosure includes two types of groups, i.e., an aromatic ring (or aromatic fused ring) and a phenanthroline (or benzoquinoline) group. These two groups not only have good electron accepting ability, but also can be well doped with metals. The planarity of the two groups is conducive to the stacking of molecules, which facilitates the combination of holes and electrons and generates excitons, thereby increasing the electron mobility of the material and improving efficiency of device.

In an approach, a processor receives an input indicative of a set of registers, the set of registers being configured for obtaining output data from a design-under-test (DUT) in a field-programmable gate array (FPGA) module. A processor executes a set of instructions for monitoring the output data in the set of registers;. A processor generates data indicative of at least one portion of changes of the output data in the set of registers during the execution of the set of instructions. A processor causes a separate machine to analyze the data via utilizing an interface to send the data to the separate machine.

Heterogeneous-computing based emulator

An organic compound can be applied as a host material for an OLED display device. The compound has a structure represented by Formula (I): 

Compound, display panel, and display apparatus

The present disclosure provides an aromatic heterocyclic compound having property of thermally activated delayed fluorescence (TADF). The aromatic heterocyclic compound has a structure represented by Formula (I), in which Xand Xeach is S, O, Se, or C; D is an electron donor, A is an electron acceptor; m is a number of the electron donor D, and the m electron donors D are the same or different; n is a number of the electron acceptor, and the n electron acceptors are the same or different; and m and n are 1 or 2. The aromatic heterocyclic compound provides a high luminescence efficiency. Organic light-emitting display devices including such aromatic heterocyclic compound have improved luminescence efficiency, lower cost and longer service life by using the aromatic heterocyclic compound as a light-emitting material, a host material, or a guest material. 

Aromatic heterocyclic compound and organic light-emitting display device

The present disclosure provides a compound used as the CPL material. The compound has a structure as shown in chemical formula I,  in which Lis selected from the group consisting of a substituted or unsubstituted C6-C30 arylene, C3-C30 heteroarylene, a substituted or unsubstituted C10-C60 fused arylene, and a substituted or unsubstituted C10-C60 fused heteroarylene; Aris selected from the group consisting of a substituted or unsubstituted C6-C30 arylene, C3-C30 heteroarylene, a substituted or unsubstituted C10-C60 fused arylene, and a substituted or unsubstituted C10-C60 fused heteroarylene; n is 1 or 2, and when n is 2, the two Arare identical or different; R, R, Rand Rare each independently selected from the group consisting of hydrogen, and a substituted or unsubstituted aryl or fused aryl, Rand Rare optionally bonded to form a ring, and Rand Rare optionally bonded to form a ring.

Compound and display panel containing the same

The computer processor identifies a first shared set of input ports that are common to a first hardware model and a second hardware model and a second shared set of input ports that are common to a first reference model and a second reference model. The computer processor selects logic of the first hardware model and logic of the second hardware model that are each traceable to the first shared set of input ports and selects logic of the first reference model and logic of the second reference model that are each traceable to the second shared set of input ports. The computer processor determines that the logic of the second hardware model and the logic of the second reference model have verified logic by determining that the logic of the first hardware model is equivalent to the logic of the second hardware model and the logic of the first reference model is equivalent to the logic of the second reference model.

Hardware incremental model checking verification

A display panel includes a light-emitting element and a capping layer disposed at a light exit side of the light-emitting element. The light-emitting element includes a first light-emitting element, a second light-emitting element and a third light-emitting element emitting a first color light, a second color light and a third color light, respectively. The capping layer includes a first capping layer and a second capping layer stacked together. The second capping layer includes a first sub-capping layer, a second sub-capping layer and a third sub-capping layer correspondingly disposed at light exit sides of the first light-emitting element, the second light-emitting element and the third light-emitting element, respectively. At least one of the first sub-capping layer, the second sub-capping layer, or the third sub-capping layers is configured to have a larger refractive index of light emitted by the corresponding light-emitting element than light emitted by other light-emitting elements.

Display panel and display device having multiple sub-capping layers

An apparatus for verification includes a processing module, a data collection module, an engine selection module and an engine execution module. The processing module processes a netlist using a plurality of engines. The netlist includes components and nodes of an integrated circuit design. Each engine includes an algorithm for verification of the integrated circuit design. The data collection module stores, for each engine, execution results for the engine for a plurality of netlists, the results stored in a history buffer. The engine selection module, for a current netlist, calculates using execution results in the history buffer which engine of the plurality of engines has a highest predicted performance and selects the engine with the highest predicted performance. The engine execution module executes the current netlist using the selected engine to produce execution results, reports the execution results and stores the execution results in the history buffer.

Verification algorithm engine selection

An apparatus for model splitting includes an extraction module that extracts netlist parameters from a static netlist. The netlist parameters include node parameters of each node of the static netlist. The node parameters include node connection information and execution cycle information. The nodes of the static netlist include nodes of an integrated circuit design from an input to an output. A split node module analyzes, using the netlist parameters, each node in a cycle and determines if each node is a potential split node, which is a node with a projected sub-proof execution time less than a time limit. A split chain module determines if a split chain exists. The split chain includes a connection between potential split nodes from the input to the output at each execution cycle. A reporting module reports nodes of a split chain in response to determining that a split chain exists.

Integrated circuit design model splitting for formal verification

In an approach for converging a cloud computing environment and a mobile device into an integrated environment, a processor receives a request to complete a computing task on a first device, wherein the computing task requires a physical sensor. A processor determines that the computing task should be offloaded from the first device to a second device based, at least in part, on the first device lacking the physical sensor and the second device having the physical sensor. A processor offloads the computing task from the first device to the second device. A processor receives a result of the computing task from the second device.

The present invention provides a method and system for distributing resources for operating applications within a network by determining a composite resource consumption of the network of resources distributed throughout the network, and determining minimum, maximum and average values of each of the resources required to operate the applications. When an application is introduced into, or removed from, the network, then a change in the composite resource consumption of the network is determined and a software patch is generated to adjust resource distribution throughout the network so that resource allocation to active applications is normalized for optimal operation.

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Shanghai, China

Yan Lu