Intel Corporation

Qualcomm Incorporated

Xxsys Technologies, Inc.

Huawei Technologies Co., Limited

Amazon Technologies, Inc.

Splunk Inc.

Biolinq Incorporated

Yan Li

Wanshi Chen

Chunhui Mei

Yongsheng Liu

Subramaniam M Maiyuran

Varghese George

Parvathanathan Subrahmanya

Dipankar Das

Naveen K Mellempudi

Andrew J Fish

Jorge E Parra

Chandra S Gurram

Ashutosh Garg

Mani Ayyar

Shubra Marwaha

Sasikanth Avancha

Wei Xiong

Durgesh Borkar

Naveed U Zaman

Dharma Teja Vooturi

Stephen William Edge

Sourabh Satish

Hong Jiang

Mahesh S Natu

Gary N Hammond

Yang Li

Supratim Pal

Nitin Kasturi

Suresh K Marisetty

Sham M Datta

Yiqun Bai

Vipul V Mehta

Gang Zhong

Ricky Lap Kei Cheung

Randall Coleman Gellens

Gokhan Mergen

Zhimin Du

George Thangadurai

Anderson Micu

David Hugh Williams

Ziyin Lin

Amy L O'Donnell

Gerald J Posakony

Jiasheng Chen

Hsing Kuo Lo

John Decker

Li Shen

Luzhou Xu

Manini S Shah

Nathaniel Lev Grossman

Min Xu

Hua Wang

Anthony Solomon

Tony Solomon

Russ Wunderlich

Daniel Alonso-soski

Jennifer Ruth Walters Fuchs

Christopher Griffith

Yiqing Cao

Lu Gao

Shuping Chen

Georgios Tsirtsis

Mingkai Nan

An apparatus to facilitate utilizing structured sparsity in systolic arrays is disclosed. The apparatus includes a processor comprising a systolic array to receive data from a plurality of source registers, the data comprising unpacked source data, structured source data that is packed based on sparsity, and metadata corresponding to the structured source data; identify portions of the unpacked source data to multiply with the structured source data, the portions of the unpacked source data identified based on the metadata; and output, to a destination register, a result of multiplication of the portions of the unpacked source data and the structured source data.

Utilizing structured sparsity in systolic arrays

Matrix multiply units can take advantage of input sparsity by zero gating ALUs, which saves power consumption, but compute throughput does not increase. To improve compute throughput from sparsity, processing resources in a matrix accelerator can skip computation with zero involved in input or output. If zeros in input can be skipped, the processing units can focus calculations on generating meaningful non-zero output.

Random sparsity handling in a systolic array

Aspects of the current subject matter are directed to a sensor assembly of an analyte monitoring device including one or more microneedle arrays. Aspects are directed to components and architecture of a sensor assembly to implement power and processing aspects of a microneedle array-based continuous analyte monitoring device for the detection and measuring of an analyte. A source of a power-on event is determined, and the analyte monitoring device is transitioned to a mode that corresponds to the determined source. When a power-on event is determined to be a valid power-on event, the analyte monitoring device is transition to a mode that corresponds to a type of the valid power-on event.

Sensor assembly of a microneedle array-based continuous analyte monitoring device

Embodiments of this disclosure provide a system and method for wireless communication and wireless sensing in a low-cost common transceiver structure. In particular, the common transceiver structure may have a common digital-to-analog converter (DAC) configured to convert a digital wireless communication signal and a digital wireless sensing signal into an analog wireless communication signal and an analog wireless sensing signal, respectively. The common transceiver may also have a common transmitting antenna configured to transmit the analog wireless communication signal and the analog wireless sensing signal.

Low-cost transceiver structure for wireless communication and sensing

Techniques are described for providing an extension framework for an IT and security operations application. The described extension framework allows various types of users to extend the user interfaces, data content, and functionality of an IT and security operations application to enhance and enrich users' workflow and investigative experiences. Example types of extensions enabled by the extension framework include modifying or supplementing GUI elements and other components, where users can implement these extensions at pre-defined extension points of the IT and security operations application. The extension framework further includes a data integration system that provides users with mechanisms to integrate data from external applications, services, or other data sources into their plugins.

Extension framework for an information technology and security operations application

Embodiments disclosed herein include composite dies and methods of forming such composite dies. In an embodiment, a composite die comprises a base substrate, a first die over the base substrate, and a second die over the base substrate and adjacent to the first die. In an embodiment an underfill layer is between the first die and the base substrate, between the second die and the base substrate, and between the first die and the second die. In an embodiment, a trench into the underfill layer is between the first die and the second die. In an embodiment the composite die further comprises, a mold layer over the first die and the second die, wherein the mold layer fills the trench.

Trenches in wafer level packages for improvements in warpage reliability and thermals

Technologies directed to Serializer/Deserializer (SerDes) connections and SerDes routing between digital beam forming (DBF) devices of a panel with an array of antenna elements, such as on satellite User Link panels, are described. A first DBF device is coupled to a first modem over a first SerDes link and coupled to RFFE circuitry. A second DBF device is coupled to the first DBF device over a second SerDes link. Each of the DBF devices is coupled to multiple antenna elements. The DBF devices route data between the modem and the other DBF devices, such as in a chain of DBF devices.

Panel Serializer/Deserializer (SerDes) routing

This disclosure describes a method and apparatus for performing tessellation in a graphics process. A graphics processing unit may be configured to determine tessellation factors for a first patch of the graphics data, determine, based on the tessellation factors, that a first edge of an outermost ring of the first patch will produce only degenerated sub-primitives, and skip performing tessellation for the first edge. A graphics processing unit may determine that a second edge of the outermost ring of the first patch will produce at least some normal sub-primitives, and perform tessellation for the second edge to produce output primitives.

Removal of degenerated sub-primitives in tessellation

Methods, systems, and devices are described for wireless communication. A wireless device such as an in-vehicle system (IVS) may transmit an emergency call (eCall) message to a third party eCall server using a communication session which may be packet based or circuit based. The eCall message may include session information and telematics data. The third party eCall server may relay the session information and telematics data to a public safety answering point (PSAP). For example, the third party eCall server may generate an automatic text-to-speech message that is transmitted to the PSAP over a public communications network. In some cases, the third party eCall server may transmit a response to the wireless device including metadata based on the telematics data transmitted in the eCall message. The eCall message may also include a call-back number, and the PSAP may contact the wireless device directly using the call-back number.

Techniques to support emergency calls with over-the-top service provider

Disclosed are methods and apparatus for predicting a channel quality indicator in a communication system, and in particular a delayed receiver. A disclosed method for determining the predictive channel quality indicator for a delayed receiver includes determining at least one channel quality indicator from a non-delayed receiver. The method also includes determining another channel quality indicator from the delayed receiver, and then calculating the predictive channel quality indicator for the delayed receiver through a function of the channel quality indicators from the non-delayed receiver and the channel quality indicator from the delayed receiver. Corresponding apparatus are also disclosed.

Methods and apparatus for predicting a channel quality indicator in a communication system

A circuit and algorithm are disclosed for a step2 search of a three step search of synchronization channels in a W-CDMA system. A mobile terminal of the CDMA system includes an RF downconverter for receiving I and Q signals. A searcher, responsive to the I and Q signals, includes a first correlator for correlating the I and Q signals with a primary synchronization code on a primary synchronization channel, and a second correlator for correlating I and Q signals with a secondary synchronization code on a secondary synchronization channel. The correlated I and Q signals are added for each of the secondary synchronization codes. An energy calculator and a maximum energy detector use the correlated I and Q signals of both the primary and secondary synchronization channels to detect the most likely scrambling code group of secondary synchronization codes.

Searcher for multiple orthogonal channels with known data&#x2014;WCDMA step2 search

Searcher for multiple orthogonal channels with known data WCDMA step2 search

Algorithm for non-volatile memory updates

A computer system enters or exits a sleeping state, such as the ACPI &ldquo;S &rdquo; state, in response to a sleep or wake event. Upon detecting the sleep or wake event, a system component generates a sleep or wake signal that instructs the computer to enter or exit the sleeping state. This sleep or wake signal is of a type to which the computer's processor does not respond. Therefore, a PMI signal is asserted in response to the sleep or wake signal. The PMI signal, when asserted, causes the processor to halt program execution.

Placing a computer system into a sleeping state

Growing community of inventors

San Diego, CA, United States of America

Yan Li