Mediatek Corporation

Yan-Hong Lu

Pei-Kuei Tsung

Shou-Jen Lai

Ming-Hao Liao

Chien-Ping Lu

Sung-Fang Tsai

Po-Chun Fan

Jia-Yang Chang

Chia-Hsien Chou

Chih-Chung Cheng

Pao-Hung Kuo

Chia-Chi Chang

Hung-Yau Lin

A computer-implemented method of executing an instruction sequence with a recursive function call of a plurality of threads within a thread group in a Single-Instruction-Multiple-Threads (SIMT) system is provided. Each thread is provided with a function call counter (FCC), an active mask, an execution mask and a per-thread program counter (PTPC). The instruction sequence with the recursive function call is executed by the threads in the thread group according to a program counter (PC) indicating a target. Upon executing the recursive function call, for each thread, the active mask is set according to the PTPC and the target indicated by the PC, the FCC is determined when entering or returning from the recursive function call, the execution mask is determined according to the FCC and the active mask. It is determined whether an execution result of the recursive function call takes effects according to the execution mask.

Methods and systems for managing an instruction sequence with a divergent control flow in a SIMT architecture

A rendering method executed by a graphics processing unit includes: loading a vertex shading command from a first command queue to a shader module; executing the vertex shading command for computing the varying of the vertices to perform a vertex shading operation by taking the vertices as first input data; storing first tessellation stage commands into a second command queue; loading the first tessellation stage commands to the shader module; and executing the first tessellation commands for computing first tessellation stage outputs to perform a first tessellation stage of the one or more tessellation stages by taking the varying of the vertices as second input data. The vertex shading command is stored into the first command queue by a first processing unit. The varying of the vertices and the first tessellation stage outputs are stored in a cache of the graphics processing unit.

Apparatus for performing tessellation operation and methods utilizing the same

A graphic processing system and a method of graphic processing are provided. The graphic processing system has a collector, a plurality of slots, a scheduler, an arbiter and at least an arithmetic logic unit (ALU). The collector is configured to group a plurality of workitems into elementary wavefronts. Each of the elementary wavefronts comprises workitems configured to execute the same kernel code. The scheduler is configured to allocate the elementary wavefronts to the slots. Two or more of the elementary wavefronts exist at one slot to form one of a plurality of macro wavefronts. The arbiter is configured to select one of the macro wavefronts. The ALU is configured to execute workitems of at least an elementary wavefront of the selected macro wavefront and output results of execution of the workitems.

Graphic processing system and method thereof

Growing community of inventors

Hsinchu, Taiwan

Yan-Hong Lu