Realtek Semiconductor Inc.

Yan-Guei Chen

Liang-Wei Huang

Shih-Hsiung Huang

Yun-Tse Chen

Ming-Chieh Cheng

Hui-Min Huang

Chi-Sheng Hsu

Hsin-Yu Lue

Shi-Ming Lu

Parameter calibration method for calibrating multiple parameters corresponding to multiple electronic components to be calibrated in a circuit, including steps: (A) turning off all of the electronic components to be calibrated and selecting a first electronic component from the electronic components to be calibrated as an electronic component being calibrated; (B) turning on the electronic component being calibrated and performing a calibration procedure on the electronic component being calibrated to determine a setting value of a parameter corresponding to the electronic component being calibrated; and (C) selecting a second electronic component from the electronic components to be calibrated as the electronic component being calibrated and performing step (B). Step (C) is repeatedly performed until all of the electronic components to be calibrated have become electronic components that have been calibrated, and when performing step (C), the electronic component(s) that have been calibrated are kept being turned on.

Parameter calibration method and semiconductor device utilizing the same

A transmission circuit includes a data input pin, a serial-to-parallel converter, an interface decoder, a parallel-to-serial converter, and a processor circuit. The serial-to-parallel converter is electrically coupled to the data input pin. The serial-to-parallel converter converts a plurality of data signals received by the first data input pin into a set of parallel data signals. The interface decoder is electrically coupled to the serial-to-parallel converter. The interface decoder decodes the set of parallel data signals to generate a set of decoded data signals for parallel transmission. The parallel-to-serial converter is electrically coupled to the interface decoder. The parallel-to-serial converter converts the set of decoded data signals into a plurality of input data signals for serial transmission. The processor circuit is electrically coupled to the parallel-to-serial converter. The processor circuit receives and processes the plurality of input data signals.

Transmission circuit and transmission system adopting reduced number of interfaces

A method for receiving data includes receiving a transmission signal through a channel, adjusting the intensity of the transmission signal to generate an adjusted transmission signal according to an analog gain level, converting the adjusted transmission signal into a digital signal, filtering the digital signal to generate a filtered signal according to a set of filter coefficients, and adjusting intensity of the filtered signal according to a digital gain level. The method further includes, in a training mode, estimating a transmission condition of the channel and adjusting the analog gain level and the digital gain level according to the transmission condition for obtaining convergent values for the set of filter coefficients before the training mode ends, and in a data mode, performing a gain adjustment operation to adjust the analog gain level and to adjust the digital gain level according to the adjustment made to the analog gain level.

Method for receiving data and data receiver

A receiving end of an electronic device includes an analog front end (AFE) circuit, a phase detector (PD), and a calculation circuit. The AFE circuit receives an input signal and adjusts the phase of the input signal according to a phase control signal. The PD detects the phase of the input signal to generate a current phase value and a phase difference accumulated value, calculates a target phase value according to the phase difference accumulated value, and generates a first phase driving value according to the target phase value and the current phase value. The calculation circuit generates the phase control signal according to the first phase driving value and a phase threshold. After the calculation circuit generates the phase control signal, the phase detector generates a second phase driving value, and the calculation circuit updates the phase threshold according to the first and second phase driving values.

Receiving end of electronic device and method of setting phase threshold of timing recovery operation

A smart phase switching method includes setting a first phase switching threshold, a convergence upper bound, and a convergence lower bound, sampling a received signal continuously for acquiring a phase offset accumulated value of the received signal during each period, updating the first phase switching threshold to generate a second phase switching upper bound threshold and a second phase switching lower bound threshold when a plurality of phase offset accumulated values of the received signal during a first predetermined time interval fall into a range from the convergence upper bound to the convergence lower bound, and sampling the received signal continuously for determining if a phase is switched to an opposite operating point according to a phase offset accumulated value of the received signal after the second phase switching upper bound threshold and the second phase switching lower bound threshold are generated.

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Hsinchu, Taiwan

Yan-Guei Chen