Intel Corporation

Advanced Micro Devices Corporation

Dow Global Technolgoies LLC

Ebay, Incorporated

Commscope Telecommunications (Shanghai) Co. Ltd.

Semiconductor Manufacturing International (Shanghai) Corporation

Semiconductor Manufacturing International (Beijing) Corporation

Alpha Omega Semiconductor Inc.

Ge Energy Power Conversion Technology Gmbh

Adc Telecommunications (Shanghai) Distribution Co., Ltd.

Donghua University

Yan Fei Liu

Xiaoping Hu

Kuei-Chung Tu

Hungviet Nguyen

Shaoguang Feng

Andreas Lutz

Gary Lee Jialanella

Glenn G Eagle

Dong Xu

Eric E Cole

Yunpeng Zhu

Ming Ming

Michael R Golden

Zhaohui Cai

Zhengbin Wang

Xianshuai Shi

Naitian Liu

Liyong Cheng

Gaoxin Dai

Vincent J Zimmer

Shuhui Chen

Tao Wu

Li Ping Wang

Tao Feng

LiMing Wang

Robert D J Froese

Robert Froese

Lechong Chen

Jia Cheng Liu

Ruisheng Wu

Roger Wencheng Hsu

Yumei Zhang

Jack Ouyang

Hong Jin

Shiqiang Cui

Tiehan Wang

Deployment of a modified service affects the functioning of other services that make use of the service. To address the problems that deployment of modified executable code can cause in other services, a dependency lock is placed on candidate code to prevent deployment until tests on the client services are successfully completed. Developers of client services that rely on a supplier service are enabled to place a dependency lock on the service. As a result, deployment of the supplier service is only allowed when tests of the client services complete successfully. The administrator of the service being deployed may control which other users are able to add dependency locks without giving those users other permissions such as the ability to modify the source code of the service, the ability to deploy the service, and the like.

Dependency lock in CICD pipelines

A type of flame-retardant cellulosic fiber and a preparation method thereof are disclosed. The preparation method includes extruding the cellulosic solution through a spinneret, coagulating, stretching, and water-washing to obtain a water-washed filament, which is then treated with a flame-retardant solution, and then rinsed and dried to prepare the flame-retardant cellulosic fiber. The water-washing temperature is &#x2264;90&#xb0; C., the temperature of the flame-retardant solution during treatment is 60-90&#xb0; C., and the rinsing temperature is 20-40&#xb0; C. The flame retardant contains more than one of a group that forms a covalent bond with a hydroxy group of the cellulosic macromolecule, a group having the ability of self-crosslinking reaction, and a group that forms a hydrogen bond with a hydroxy group of the cellulosic macromolecule. The prepared flame-retardant cellulosic fiber is mainly composed of the cellulosic fiber matrix and the flame retardant dispersed in the matrix.

Method for preparing flame-retardant cellulosic fibers

This invention discloses a type of optical cable wiring system, including: a main optical cable, first optical cable connector box and optical cable fan-out disposed near a first user zone; a second optical cable connector box disposed at a distance from the first user zone and near a second user zone; and a single main adapter optical cable disposed between the first optical cable connector box and second optical cable connector box. An optical cable fan-out converts a single main adapter optical cable to multiple branch adapter optical cables. Multiple branch adapter optical cables are connected to the main optical cable via a first optical cable connector box; multiple first distribution optical cables for the purpose of connection to a first user zone are connected to a main optical cable via a first optical cable connector box; multiple first distribution optical cables for the purpose of connection to a second user zone are connected to a single main adapter optical cable via a second optical cable connector box. In this manner, it becomes unnecessary to lay multiple second distribution optical cables over long distances between the first user zone and second user zone, thus reducing the laying length of second distribution optical cables, reducing material and labour costs, and additionally improving municipal aesthetics.

Optical cable wiring system and optical cable connecting component

This invention discloses a type of optical cable wiring system, including: a main optical cable, first optical cable connector box and optical cable fan-out disposed near a first user zone; a second optical cable connector box disposed at a distance from the first user zone and near a second user zone; and a single main adapter optical cable disposed between the first optical cable connector box and second optical cable connector box. An optical cable fan-out converts a single main adapter optical cable to multiple branch adapter optical cables. Multiple branch adapter optical cables are connected to the main optical cable via a first optical cable connector box; multiple first distribution optical cables for the purpose of connection to a first user zone are connected to a main optical cable via a first optical cable connector box; multiple first distribution optical cables for the purpose of connection to a second user zone are connected to a single main adapter optical cable via a second optical cable connector box. In this manner, it becomes unnecessary to lay multiple second distribution optical cables over long distances between the first user zone and second user zone, thus reducing the laying length of second distribution optical cables, reducing material and labor costs, and additionally improving municipal aesthetics.

A method for fabricating a semiconductor structure includes providing a substrate, forming a plurality of gate electrodes on the substrate, forming a plurality of first sidewall spacers on the side surfaces of the plurality of gate electrodes, forming an oxide layer on the substrate, and forming a plurality of second sidewall spacers on the oxide layer covering the side surfaces of the plurality of first sidewall spacers. Each gate electrode, first sidewall spacers formed on the side surfaces of the gate electrode, and second sidewall spacers formed on the side surfaces of the first sidewall spacers together form a gate structure. The method includes forming an undercut, having an undercut angle made between the oxide layer and the substrate under each second sidewall spacer, and forming a plurality of grooves through the oxide layer and into the substrate. Each groove includes undercuts under second sidewall spacers of adjacent gate structures.

Semiconductor structures and fabrication methods thereof

Epoxy adhesive compositions contain a heat-activatable catalyst. The heat-activatable catalyst includes a tertiary amine catalyst and a novolac resin that has a weight average molecular weight of at least 3000. One-component epoxy adhesive formulations that contain the heat-activatable catalyst have unexpectedly good storage stability.

Storage-stable heat-activated tertiary amine catalysts for epoxy resins

A system has a plurality of functional modules including a first functional module and one or more other functional modules. The first functional module includes an embedded memory element and is configurable in a plurality of modes including a first mode and a second mode. When the first functional module is in the first mode, access to the embedded memory element is limited to the first functional module. At least one of the one or more other functional modules is provided with access to the embedded memory element based at least in part on the first functional module being in the second mode.

Mode-dependent access to embedded memory elements

A device includes a transformer configured to supply a pre-charge voltage to a capacitor and a converter configured for coupling to the transformer and responsive to an increasing modulation index. The modulation index increases for a time quanta after the capacitor becomes substantially fully charged and the pre-charge voltage is substantially constant during the time quanta.

Input filter pre-charge fed by a medium-voltage grid supply

A device is provided and includes a first catch plate and a retention ring. The first catch plate includes a plurality of first catch plate gripping slots spaced apart from each other and disposed about a circumference thereof. Each of the plurality of first catch plate griping slots include a wire receiving opening extending through a thickness of the first catch plate. The retention ring is removably secured to a periphery of the first catch plate.

Device for fixing wires

A method and system for minimizing bus traffic in a video decoder is disclosed. A method and system for processing a portion of a reference picture includes designating the reference picture, selecting a display picture within the reference picture, transmitting a display picture size, and sending a display picture offset. A method and system for compressing IDCT coefficients corresponding to a macroblock, the macroblock having a plurality of blocks, includes locating each non-zero IDCT coefficient corresponding to one of the plurality of blocks, assigning an index to the non-zero IDCT coefficient, the index designating a location within the one of the plurality of blocks, packing the non-zero IDCT coefficient in little endian format, and specifying a terminator bit corresponding to the non-zero coefficient, the terminator bit indicating the end of all non-zero IDCT coefficients for the one of the plurality of blocks. A method and system for selectively controlling each hardware device within a video decoder includes obtaining a video stream, performing VLC decoding, encoding a plurality of instructions to control each hardware device within the video decoder, decoding each one of the plurality of instructions, and optionally performing an IDCT in response to each one of the plurality of instructions.

Method and system for data management in a video decoder

A wafer level chip scale package and method of laser marking the same are disclosed. The method includes forming a plurality of semiconductor devices on a frontside surface of a wafer, metallizing device contacts on the frontside surface of the wafer, grinding the backside surface of the wafer, silicon etching the backside surface of the wafer, laser marking the backside surface of the wafer following the silicon etch step, oxide etching the backside surface of the wafer following the laser marking step, depositing a metal layer on the backside surface of the wafer following the oxide etch step, and dicing the wafer into wafer level chip scale packages. A wafer level chip scale package includes a mark formed on a backside surface thereof, the mark comprising a plurality of trenches formed in a silicon backside surface and corresponding indentations formed in an overlaying back metal layer.

Wafer level chip scale package and method of laser marking the same

Growing community of inventors

Pudong, China

Yan Fei Liu