Yangtze Memory Technologies Co., Ltd.

YaLi Song

Li Hong Xiao

Ying Cui

Yuanyuan Min

Ming Wang

HongTao Liu

Jie Yuan

A 3D-NAND memory device is provided. The memory device includes a substrate, a bottom select gate (BSG) disposed over the substrate, a plurality of word lines positioned over the BSG with a staircase configuration and a plurality of insulating layers disposed between the substrate, the BSG, and the plurality of word lines. In the disclosed memory device, one or more first dielectric trenches are formed in the BSG and extend in a length direction of the substrate to separate the BSG into a plurality of sub-BSGs. In addition, one or more common source regions are formed over the substrate and extend in the length direction of the substrate. The one or more common source regions further extend through the BSG, the plurality of word lines and the plurality of insulating layers.

3D NAND memory device and method of forming the same

The present disclosure provides a three-dimensional NAND memory device, comprising a NAND string including a memory cell to be inhibited to program, a word line driver, and a controller configured to control the word line driver to perform a programming operation on the memory cell controlled by a selected word line of a plurality of word lines including a first unselected word line adjacent to the selected word line, a first plurality of unselected word lines adjacent to the first unselected word line, and a second plurality of unselected word lines adjacent to the first plurality of unselected word lines. The programming operation includes applying a programming voltage signal to the selected word line; applying a first pass voltage to the first plurality of unselected word lines; and applying a second pass voltage to the second plurality of unselected word lines, the first pass voltage is different from the second pass voltage.

Method of reducing Vpass disturb in 3D nand systems

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Hubei, China

YaLi Song