Taiwan Semiconductor Manufacturing Comp. Ltd.

Yahru Cheng

Ching-Yu Chang

Tze-Liang Lee

Jr-Hung Li

Ming-Hui Weng

Chih-Cheng Liu

Yen-Yu Chen

Chi-Ming Yang

Yi-Chen Kuo

Jia-Lin Wei

Chin-Hsiang Lin

An-Ren Zi

Chien-Chih Chen

Yee-Chia Yeo

Huicheng Chang

Keng-Chu Lin

Chih-Tsung Shih

Bo-Tsun Liu

Shuen-Shin Liang

Chen-Yu Liu

Tsu-Hsiu Perng

Tsai-Jung Ho

Chen-Han Wang

Ting-Ting Chen

Yu-Chung Su

Chen-Fong Tsai

Tetsuji Ueno

Tsung Chuan Lee

Tsai-Yu Huang

Chun-Chih Ho

Tsung-Han Ko

Chen-Ming Wang

Yu-Ling Chang Chien

Ya-Lun Chen

Kuan-Hsin Lo

A photoresist developer includes a solvent having Hansen solubility parameters of 15<δ<25, 10<δ<25, and 6<δ<30; an acid having an acid dissociation constant, pKa, of −15<pKa<4, or a base having a pKa of 40>pKa>9.5; and a chelate.

Photoresist developer and method of developing photoresist

A method of forming a pattern in a photoresist layer includes forming a photoresist layer over a substrate, and reducing moisture or oxygen absorption characteristics of the photoresist layer. The photoresist layer is selectively exposed to actinic radiation to form a latent pattern, and the latent pattern is developed by applying a developer to the selectively exposed photoresist layer to form a pattern.

Photoresist layer surface treatment, cap layer, and method of forming photoresist pattern

A method of manufacturing a semiconductor device includes forming a photoresist layer over a substrate and forming a dehydrated film over the photoresist layer. The photoresist layer is selectively exposed to actinic radiation to form an exposed portion and an unexposed portion of the photoresist layer. The photoresist layer is developed to remove the unexposed portion of the photoresist layer and a first portion of the dehydrated film over the unexposed portion of the photoresist layer. In an embodiment, the method includes etching the substrate by using the exposed portion of the photoresist layer as a mask.

Photoresist layer outgassing prevention

In a method of manufacturing a semiconductor device, a metallic photoresist layer is formed over a target layer to be patterned, the metallic photoresist layer is selectively exposed to actinic radiation to form a latent pattern, and the latent pattern is developed by applying a developer to the selectively exposed photoresist layer to form a pattern. The metallic photo resist layer is an alloy layer of two or more metal elements, and the selective exposure changes a phase of the alloy layer.

Method of manufacturing semiconductor devices and pattern formation method

Method of manufacturing semiconductor device includes forming photoresist layer over substrate. Forming photoresist layer includes combining first precursor and second precursor in vapor state to form photoresist material, wherein first precursor is organometallic having formula: MRX, where M at least one of Sn, Bi, Sb, In, Te, Ti, Zr, Hf, V, Co, Mo, W, Al, Ga, Si, Ge, P, As, Y, La, Ce, Lu; R is substituted or unsubstituted alkyl, alkenyl, carboxylate group; X is halide or sulfonate group; and 1≤a≤2, b≥1, c≥1, and b+c≤5. Second precursor is at least one of an amine, a borane, a phosphine. Forming photoresist layer includes depositing photoresist material over the substrate. The photoresist layer is selectively exposed to actinic radiation to form latent pattern, and the latent pattern is developed by applying developer to selectively exposed photoresist layer to form pattern.

Method of manufacturing a semiconductor device

A method of manufacturing semiconductor device includes forming a multilayer photoresist structure including a metal-containing photoresist over a substrate. The multilayer photoresist structure includes two or more metal-containing photoresist layers having different physical parameters. The metal-containing photoresist is a reaction product of a first precursor and a second precursor, and each layer of the multilayer photoresist structure is formed using different photoresist layer formation parameters. The different photoresist layer formation parameters are one or more selected from the group consisting of the first precursor, an amount of the first precursor, the second precursor, an amount of the second precursor, a length of time each photoresist layer formation operation, and heating conditions of the photoresist layers. The multilayer photoresist structure is selectively exposed to actinic radiation to form a latent pattern, and the latent pattern is developed by applying developer to the selectively exposed multilayer photoresist structure to form the pattern.

A method of manufacturing a semiconductor device includes forming a photoresist layer over a substrate. A first precursor and a second precursor are combined. The first precursor is an organometallic having a formula: MRX, where M is one or more of Sn, Bi, Sb, In, and Te, R is one or more of a C7-C11 aralkyl group, a C3-C10 cycloalkyl group, a C2-C10 alkoxy group, and a C2-C10 alkylamino group, X is one or more of a halogen, a sulfonate group, and an alkylamino group, and 1≤a≤2, b≥1, c≥1, and b+c≤4, and the second precursor is one or more of water, an amine, a borane, and a phosphine. The photoresist layer is selectively exposed to actinic radiation to form a latent pattern. The latent pattern is developed by applying a developer to the selectively exposed photoresist layer.

Method of manufacturing a semiconductor device and pattern formation method

In a pattern formation method, a photoresist layer is formed over a substrate by combining a first precursor and a second precursor in a vapor state to form a photoresist material. The first precursor is an organometallic having a formula MRX, where M is one or more selected from the group consisting of Sn, Bi, Sb, In, and Te, R is an alkyl group that is substituted by different EDG and/or EWG, X is a halide or sulfonate group, and 1≤a≤2, b≥1, c≥1, and b+c≤4. The second precursor is water, an amine, a borane, and/or a phosphine. The photoresist material is deposited over the substrate, and selectively exposed to actinic radiation to form a latent pattern, and the latent pattern is developed by applying a developer to the selectively exposed photoresist layer to form a pattern.

A method of manufacturing a semiconductor device includes forming a photoresist layer over a substrate, including combining a first precursor and a second precursor in a vapor state to form a photoresist material, and depositing the photoresist material over the substrate. A protective layer is formed over the photoresist layer. The photoresist layer is selectively exposed to actinic radiation through the protective layer to form a latent pattern in the photoresist layer. The protective layer is removed, and the latent pattern is developed by applying a developer to the selectively exposed photoresist layer to form a pattern.

A method for forming a semiconductor device is provided. The method includes applying a photoresist composition over a substrate, thereby forming a photoresist layer over the substrate; performing a first baking process to the photoresist layer; exposing the photoresist layer to an extreme ultraviolet (EUV) radiation, thereby forming a pattern therein; performing a second baking process to the photoresist layer; and developing the photoresist layer having the pattern therein using a developer, thereby forming a patterned photoresist layer. The first baking process and the second baking process are conducted under an ambient atmosphere having a humidity level ranging from 55% to 100%.

Humidity control or aqueous treatment for EUV metallic resist

The present disclosure describes a method of forming an intermediate spacer structure between a gate structure and a source/drain (S/D) contact structure and removing a top portion of the intermediate spacer structure to form a recess. The intermediate spacer structure includes a first spacer layer, a second spacer layer, and a sacrificial spacer layer between the first spacer layer and the second spacer layer. The method further includes removing the sacrificial spacer layer to form an air gap between the first spacer layer and the second spacer layer and spinning a dielectric layer on the air gap, the first spacer layer, and the second spacer layer to fill in the recess and seal the air gap. The dielectric layer includes raw materials for a spin-on dielectric material.

Air spacer formation with a spin-on dielectric material

To reduce a thickness variation of a spin-on coating (SOC) layer that is applied over a plurality of first and second trenches with different pattern densities as a bottom layer in a photoresist stack, a two-step thermal treatment process is performed on the SOC layer. A first thermal treatment step in the two-step thermal treatment process is conducted at a first temperature below a cross-linking temperature of the SOC layer to cause flow of the SOC layer, and a second thermal treatment step in the two-step thermal treatment process is conducted at a second temperature to cause cross-linking of the SOC layer.

Ambient controlled two-step thermal treatment for spin-on coating layer planarization

A method of generating a layout pattern includes disposing a photoresist layer of a resist material on a substrate and disposing a top layer over of the photoresist layer. The top layer is transparent for extreme ultraviolet (EUV) radiation and the top layer is opaque for deep ultraviolet (DUV) radiation. The method further includes irradiating the photoresist layer with radiation generated from an EUV radiation source. The radiation passes through the top layer to expose the photoresist layer.

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Taipei, Taiwan

Yahru Cheng